ArmPlatformPkg: Fix and Implement ArmPlatformGetPrimaryCoreMpId

- Used correct PCD
- Implement the function for AArch64, BeagleBoard, CTA15A7

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14937 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Olivier Martin 2013-12-06 16:11:34 +00:00 committed by oliviermartin
parent d5ad0813ac
commit 99267097f3
11 changed files with 86 additions and 6 deletions

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@ -22,6 +22,7 @@
GCC_ASM_EXPORT(ArmPlatformPeiBootAction) GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
GCC_ASM_EXPORT(ArmPlatformGetCorePosition) GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore) GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
ASM_PFX(ArmPlatformPeiBootAction): ASM_PFX(ArmPlatformPeiBootAction):
bx lr bx lr
@ -66,3 +67,23 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
movne r0, #0 movne r0, #0
bx lr bx lr
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
// Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
// with cpu_id[0:3] and cluster_id[4:7]
LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r0)
ldr r0, [r0]
lsr r0, #24
// Shift the SCC value to get the cluster ID at the offset #8
lsl r1, r0, #4
and r1, r1, #0xF00
// Keep only the cpu ID from the original SCC
and r0, r0, #0x0F
// Add the Cluster ID to the Cpu ID
orr r0, r0, r1
bx lr

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@ -21,6 +21,7 @@
EXPORT ArmPlatformPeiBootAction EXPORT ArmPlatformPeiBootAction
EXPORT ArmPlatformGetCorePosition EXPORT ArmPlatformGetCorePosition
EXPORT ArmPlatformIsPrimaryCore EXPORT ArmPlatformIsPrimaryCore
EXPORT ArmPlatformGetPrimaryCoreMpId
PRESERVE8 PRESERVE8
AREA CTA15A7Helper, CODE, READONLY AREA CTA15A7Helper, CODE, READONLY
@ -71,4 +72,26 @@ ArmPlatformIsPrimaryCore FUNCTION
bx lr bx lr
ENDFUNC ENDFUNC
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
ArmPlatformGetPrimaryCoreMpId FUNCTION
// Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
// with cpu_id[0:3] and cluster_id[4:7]
LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r0)
ldr r0, [r0]
lsr r0, #24
// Shift the SCC value to get the cluster ID at the offset #8
lsl r1, r0, #4
and r1, r1, #0xF00
// Keep only the cpu ID from the original SCC
and r0, r0, #0x0F
// Add the Cluster ID to the Cpu ID
orr r0, r0, r1
bx lr
ENDFUNC
END END

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@ -19,6 +19,7 @@
GCC_ASM_EXPORT(ArmPlatformPeiBootAction) GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore) GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
GCC_ASM_EXPORT(ArmPlatformGetCorePosition) GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore) GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
@ -29,7 +30,7 @@ GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
// VOID // VOID
// ); // );
ASM_PFX(ArmPlatformGetPrimaryCoreMpId): ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r0) LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
ldr r0, [r0] ldr r0, [r0]
bx lr bx lr

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@ -33,7 +33,7 @@
// VOID // VOID
// ); // );
ArmPlatformGetPrimaryCoreMpId FUNCTION ArmPlatformGetPrimaryCoreMpId FUNCTION
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r0) LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
ldr r0, [r0] ldr r0, [r0]
bx lr bx lr
ENDFUNC ENDFUNC

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@ -22,6 +22,7 @@
GCC_ASM_EXPORT(ArmPlatformPeiBootAction) GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore) GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
GCC_ASM_EXPORT(ArmPlatformGetCorePosition) GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
GCC_ASM_EXPORT(ArmGetCpuCountPerCluster) GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)
@ -32,6 +33,15 @@ GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
ASM_PFX(ArmPlatformPeiBootAction): ASM_PFX(ArmPlatformPeiBootAction):
ret ret
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
ldrh w0, [x0]
ret
# IN None # IN None
# OUT x0 = number of cores present in the system # OUT x0 = number of cores present in the system
ASM_PFX(ArmGetCpuCountPerCluster): ASM_PFX(ArmGetCpuCountPerCluster):

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@ -49,7 +49,7 @@ ASM_PFX(ArmGetScuBaseAddress):
// VOID // VOID
// ); // );
ASM_PFX(ArmPlatformGetPrimaryCoreMpId): ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r0) LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
ldr r0, [r0] ldr r0, [r0]
bx lr bx lr

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@ -52,7 +52,7 @@ ArmGetScuBaseAddress FUNCTION
// VOID // VOID
// ); // );
ArmPlatformGetPrimaryCoreMpId FUNCTION ArmPlatformGetPrimaryCoreMpId FUNCTION
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r0) LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
ldr r0, [r0] ldr r0, [r0]
bx lr bx lr
ENDFUNC ENDFUNC

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@ -43,7 +43,7 @@ ASM_PFX(ArmPlatformGetCorePosition):
// VOID // VOID
// ); // );
ASM_PFX(ArmPlatformGetPrimaryCoreMpId): ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r0) LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
ldr r0, [r0] ldr r0, [r0]
bx lr bx lr

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@ -47,7 +47,7 @@ ArmPlatformGetCorePosition FUNCTION
// VOID // VOID
// ); // );
ArmPlatformGetPrimaryCoreMpId FUNCTION ArmPlatformGetPrimaryCoreMpId FUNCTION
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r0) LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
ldr r0, [r0] ldr r0, [r0]
bx lr bx lr
ENDFUNC ENDFUNC

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@ -18,8 +18,11 @@
.align 2 .align 2
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore) GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
GCC_ASM_EXPORT(ArmPlatformPeiBootAction) GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
GCC_ASM_IMPORT(ArmReadMpidr)
//UINTN //UINTN
//ArmPlatformIsPrimaryCore ( //ArmPlatformIsPrimaryCore (
// IN UINTN MpId // IN UINTN MpId
@ -32,4 +35,13 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
ASM_PFX(ArmPlatformPeiBootAction): ASM_PFX(ArmPlatformPeiBootAction):
bx lr bx lr
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
// The BeagleBoard is a uniprocessor platform. The MPIDR of primary core is
// always the MPIDR of the calling CPU.
b ASM_PFX(ArmReadMpidr)
ASM_FUNCTION_REMOVE_IF_UNREFERENCED ASM_FUNCTION_REMOVE_IF_UNREFERENCED

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@ -20,6 +20,9 @@
EXPORT ArmPlatformPeiBootAction EXPORT ArmPlatformPeiBootAction
EXPORT ArmPlatformIsPrimaryCore EXPORT ArmPlatformIsPrimaryCore
EXPORT ArmPlatformGetPrimaryCoreMpId
IMPORT ArmReadMpidr
AREA BeagleBoardHelper, CODE, READONLY AREA BeagleBoardHelper, CODE, READONLY
@ -37,4 +40,14 @@ ArmPlatformPeiBootAction FUNCTION
bx lr bx lr
ENDFUNC ENDFUNC
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
ArmPlatformGetPrimaryCoreMpId FUNCTION
// The BeagleBoard is a uniprocessor platform. The MPIDR of primary core is
// always the MPIDR of the calling CPU.
b ArmReadMpidr
ENDFUNC
END END