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UefiCpuPkg/PiSmmCpuDxeSmm: update comments in IA32 SmmStartup() 

The gSmmCr3, gSmmCr4, gSmmCr0 and gSmmJmpAddr global variables are used
for patching assembly instructions, thus we can't yet remove the DB
encodings for those instructions. At least we should add the intended
meanings in comments.

This patch only changes comments.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
[lersek@redhat.com: adapt commit msg to ongoing PatchAssembly discussion]
This commit is contained in:
Laszlo Ersek 2018-01-30 14:31:23 +01:00
parent d5988a8ac9
commit 994df20926
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
View File

@ -47,12 +47,12 @@ ASM_PFX(SmmStartup):
cpuid
DB 0x66
mov ebx, edx ; rdmsr will change edx. keep it in ebx.
DB 0x66, 0xb8
DB 0x66, 0xb8 ; mov eax, imm32
ASM_PFX(gSmmCr3): DD 0
mov cr3, eax
DB 0x67, 0x66
lgdt [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]
DB 0x66, 0xb8
DB 0x66, 0xb8 ; mov eax, imm32
ASM_PFX(gSmmCr4): DD 0
mov cr4, eax
DB 0x66
@ -64,11 +64,11 @@ ASM_PFX(gSmmCr4): DD 0
or ah, BIT3 ; set NXE bit
wrmsr
.1:
DB 0x66, 0xb8
DB 0x66, 0xb8 ; mov eax, imm32
ASM_PFX(gSmmCr0): DD 0
DB 0xbf, PROTECT_MODE_DS, 0 ; mov di, PROTECT_MODE_DS
mov cr0, eax
DB 0x66, 0xea ; jmp far [ptr48]
DB 0x66, 0xea ; jmp far [ptr48]
ASM_PFX(gSmmJmpAddr):
DD @32bit
DW PROTECT_MODE_CS