ArmPlatform/PrePi: Fixed PrePi for MP Cores platform and Global Variable region settings

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12638 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin 2011-11-01 23:41:52 +00:00
parent 513aa3497a
commit 99565b88c1
9 changed files with 114 additions and 25 deletions

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@ -18,7 +18,7 @@
#include <Library/BaseMemoryLib.h>
#include <Library/PcdLib.h>
#define IS_XIP() ((PcdGet32 (PcdFdBaseAddress) > (PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize))) || \
#define IS_XIP() (((UINT32)PcdGet32 (PcdFdBaseAddress) > (UINT32)(PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize))) || \
((PcdGet32 (PcdFdBaseAddress) + PcdGet32 (PcdFdSize)) < PcdGet32 (PcdSystemMemoryBase)))
// Declared by ArmPlatformPkg/PrePi Module
@ -35,7 +35,8 @@ ArmPlatformGetGlobalVariable (
if (IS_XIP()) {
// In Case of XIP, we expect the Primary Stack at the top of the System Memory
GlobalVariableBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize) - PcdGet32 (PcdPeiGlobalVariableSize);
// The size must be 64bit aligned to allow 64bit variable to be aligned
GlobalVariableBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize) - ALIGN_VALUE(PcdGet32 (PcdPeiGlobalVariableSize),0x8);
} else {
GlobalVariableBase = mGlobalVariableBase;
}
@ -60,7 +61,8 @@ ArmPlatformSetGlobalVariable (
if (IS_XIP()) {
// In Case of XIP, we expect the Primary Stack at the top of the System Memory
GlobalVariableBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize) - PcdGet32 (PcdPeiGlobalVariableSize);
// The size must be 64bit aligned to allow 64bit variable to be aligned
GlobalVariableBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize) - ALIGN_VALUE(PcdGet32 (PcdPeiGlobalVariableSize),0x8);
} else {
GlobalVariableBase = mGlobalVariableBase;
}

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@ -16,6 +16,32 @@
#include <Library/ArmGicLib.h>
#include <Ppi/ArmMpCoreInfo.h>
EFI_STATUS
GetPlatformPpi (
IN EFI_GUID *PpiGuid,
OUT VOID **Ppi
)
{
UINTN PpiListSize;
UINTN PpiListCount;
EFI_PEI_PPI_DESCRIPTOR *PpiList;
UINTN Index;
PpiListSize = 0;
ArmPlatformGetPlatformPpiList (&PpiListSize, &PpiList);
PpiListCount = PpiListSize / sizeof(EFI_PEI_PPI_DESCRIPTOR);
for (Index = 0; Index < PpiListCount; Index++, PpiList++) {
if (CompareGuid (PpiList->Guid, PpiGuid) == TRUE) {
*Ppi = PpiList->Ppi;
return EFI_SUCCESS;
}
}
return EFI_NOT_FOUND;
}
VOID
PrimaryMain (
IN UINTN UefiMemoryBase,
@ -24,6 +50,15 @@ PrimaryMain (
IN UINT64 StartTimeStamp
)
{
// On MP Core Platform we must implement the ARM MP Core Info PPI (gArmMpCoreInfoPpiGuid)
DEBUG_CODE_BEGIN();
EFI_STATUS Status;
ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi;
Status = GetPlatformPpi (&gArmMpCoreInfoPpiGuid, (VOID**)&ArmMpCoreInfoPpi);
ASSERT_EFI_ERROR (Status);
DEBUG_CODE_END();
// Enable the GIC Distributor
ArmGicEnableDistributor(PcdGet32(PcdGicDistributorBase));
@ -44,23 +79,50 @@ SecondaryMain (
IN UINTN MpId
)
{
// Function pointer to Secondary Core entry point
VOID (*secondary_start)(VOID);
UINTN secondary_entry_addr=0;
EFI_STATUS Status;
ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi;
UINTN Index;
UINTN ArmCoreCount;
ARM_CORE_INFO *ArmCoreInfoTable;
UINT32 ClusterId;
UINT32 CoreId;
VOID (*SecondaryStart)(VOID);
UINTN SecondaryEntryAddr;
ClusterId = GET_CLUSTER_ID(MpId);
CoreId = GET_CORE_ID(MpId);
// On MP Core Platform we must implement the ARM MP Core Info PPI (gArmMpCoreInfoPpiGuid)
Status = GetPlatformPpi (&gArmMpCoreInfoPpiGuid, (VOID**)&ArmMpCoreInfoPpi);
ASSERT_EFI_ERROR (Status);
ArmCoreCount = 0;
Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);
ASSERT_EFI_ERROR (Status);
// Find the core in the ArmCoreTable
for (Index = 0; Index < ArmCoreCount; Index++) {
if ((ArmCoreInfoTable[Index].ClusterId == ClusterId) && (ArmCoreInfoTable[Index].CoreId == CoreId)) {
break;
}
}
// The ARM Core Info Table must define every core
ASSERT (Index != ArmCoreCount);
// Clear Secondary cores MailBox
ArmClearMPCoreMailbox();
MmioWrite32 (ArmCoreInfoTable[Index].MailboxClearAddress, ArmCoreInfoTable[Index].MailboxClearValue);
while (secondary_entry_addr = ArmGetMPCoreMailbox(), secondary_entry_addr == 0) {
ArmCallWFI();
SecondaryEntryAddr = 0;
while (SecondaryEntryAddr = MmioRead32 (ArmCoreInfoTable[Index].MailboxGetAddress), SecondaryEntryAddr == 0) {
ArmCallWFI ();
// Acknowledge the interrupt and send End of Interrupt signal.
ArmGicAcknowledgeSgiFrom (PcdGet32(PcdGicInterruptInterfaceBase), PRIMARY_CORE_ID);
}
secondary_start = (VOID (*)())secondary_entry_addr;
// Jump to secondary core entry point.
secondary_start();
SecondaryStart = (VOID (*)())SecondaryEntryAddr;
SecondaryStart();
// The secondaries shouldn't reach here
ASSERT(FALSE);

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@ -22,6 +22,11 @@ PrimaryMain (
IN UINT64 StartTimeStamp
)
{
DEBUG_CODE_BEGIN();
// On MPCore system, PeiMpCore.inf should be used instead of PeiUniCore.inf
ASSERT(ArmIsMpCore() == 0);
DEBUG_CODE_END();
PrePiMain (UefiMemoryBase, StacksBase, GlobalVariableBase, StartTimeStamp);
// We must never return

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@ -34,7 +34,7 @@ ASM_PFX(_ModuleEntryPoint):
and r5, r0, r1
_SetSVCMode:
// Enter SVC mode
// Enter SVC mode, Disable FIQ and IRQ
mov r1, #0x13|0x80|0x40
msr CPSR_c, r1
@ -98,7 +98,7 @@ _GetStackBaseMpCore:
// Is it the Primary Core ?
LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)
cmp r0, r4
cmp r5, r4
beq _SetupPrimaryCoreStack
_SetupSecondaryCoreStack:

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@ -35,7 +35,7 @@ _ModuleEntryPoint
and r5, r0, r1
_SetSVCMode
// Enter SVC mode
// Enter SVC mode, Disable FIQ and IRQ
mov r1, #0x13|0x80|0x40
msr CPSR_c, r1
@ -99,7 +99,7 @@ _GetStackBaseMpCore
// Is it the Primary Core ?
LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)
cmp r0, r4
cmp r5, r4
beq _SetupPrimaryCoreStack
_SetupSecondaryCoreStack

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@ -38,6 +38,7 @@
BaseLib
DebugLib
DebugAgentLib
ArmCpuLib
ArmLib
ArmGicLib
IoLib
@ -55,6 +56,9 @@
PlatformPeiLib
MemoryInitPeiLib
[Ppis]
gArmMpCoreInfoPpiGuid
[Guids]
gArmGlobalVariableGuid

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@ -38,6 +38,7 @@
BaseLib
DebugLib
DebugAgentLib
ArmCpuLib
ArmLib
IoLib
TimerLib
@ -57,6 +58,9 @@
[Guids]
gArmGlobalVariableGuid
[Guids]
gArmGlobalVariableGuid
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable
gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob

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@ -14,10 +14,9 @@
#include <PiPei.h>
#include <Library/ArmCpuLib.h>
#include <Library/DebugAgentLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/PrePiLib.h>
#include <Library/IoLib.h>
#include <Library/PrintLib.h>
#include <Library/PeCoffGetEntryPointLib.h>
#include <Library/PrePiHobListPointerLib.h>
@ -31,7 +30,7 @@
#include "PrePi.h"
#include "LzmaDecompress.h"
#define IS_XIP() ((FixedPcdGet32 (PcdFdBaseAddress) > (FixedPcdGet32 (PcdSystemMemoryBase) + FixedPcdGet32 (PcdSystemMemorySize))) || \
#define IS_XIP() (((UINT32)FixedPcdGet32 (PcdFdBaseAddress) > (UINT32)(FixedPcdGet32 (PcdSystemMemoryBase) + FixedPcdGet32 (PcdSystemMemorySize))) || \
((FixedPcdGet32 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) < FixedPcdGet32 (PcdSystemMemoryBase)))
// Not used when PrePi in run in XIP mode
@ -89,7 +88,7 @@ PrePiMain (
// If ensure the FD is either part of the System Memory or totally outside of the System Memory (XIP)
ASSERT (IS_XIP() ||
((FixedPcdGet32 (PcdFdBaseAddress) >= FixedPcdGet32 (PcdSystemMemoryBase)) &&
((FixedPcdGet32 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (FixedPcdGet32 (PcdSystemMemoryBase) + FixedPcdGet32 (PcdSystemMemorySize)))));
((UINT32)(FixedPcdGet32 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT32)(FixedPcdGet32 (PcdSystemMemoryBase) + FixedPcdGet32 (PcdSystemMemorySize)))));
// Enable program flow prediction, if supported.
ArmEnableBranchPrediction ();
@ -106,10 +105,6 @@ PrePiMain (
// Initialize the Debug Agent for Source Level Debugging
InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);
SaveAndSetDebugTimerInterrupt (TRUE);
if (!IS_XIP()) {
mGlobalVariableBase = GlobalVariableBase;
}
// Declare the PI/UEFI memory region
HobList = HobConstructor (
@ -125,7 +120,11 @@ PrePiMain (
ASSERT_EFI_ERROR (Status);
// Create the Stacks HOB (reserve the memory for all stacks)
StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize) + (FixedPcdGet32(PcdClusterCount) * 4 * FixedPcdGet32(PcdCPUCoreSecondaryStackSize));
if (ArmIsMpCore ()) {
StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize) + (FixedPcdGet32(PcdClusterCount) * 4 * FixedPcdGet32(PcdCPUCoreSecondaryStackSize));
} else {
StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);
}
BuildStackHob (StacksBase, StacksSize);
// Declare the Global Variable HOB
@ -198,6 +197,17 @@ CEntryPoint (
ArmEnableDataCache ();
ArmEnableInstructionCache ();
// Define the Global Variable region when we are not running in XIP
if (!IS_XIP()) {
if (IS_PRIMARY_CORE(MpId)) {
mGlobalVariableBase = GlobalVariableBase;
ArmCpuSynchronizeSignal (ARM_CPU_EVENT_DEFAULT);
} else {
// Wait the Primay core has defined the address of the Global Variable region
ArmCpuSynchronizeWait (ARM_CPU_EVENT_DEFAULT);
}
}
// Write VBAR - The Vector table must be 32-byte aligned
ASSERT (((UINT32)PrePiVectorTable & ((1 << 5)-1)) == 0);
ArmWriteVBar ((UINT32)PrePiVectorTable);

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@ -19,7 +19,9 @@
#include <Library/PcdLib.h>
#include <Library/ArmLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/HobLib.h>
#include <Library/SerialPortLib.h>