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Remove the instance of BaseSmbusLib 

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@1076 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
qhuang8 2006-07-23 12:55:55 +00:00
parent 1f33a17ff1
commit 9a557fb6c7
3 changed files with 0 additions and 1016 deletions
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63
MdePkg/Library/BaseSmbusLib/BaseSmbusLib.msa
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@ -1,63 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<!--
Copyright (c) 2006, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-->
<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">
<MsaHeader>
<ModuleName>BaseSmbusLib</ModuleName>
<ModuleType>BASE</ModuleType>
<GuidValue>4c38a173-b317-4f29-a7bf-1cc7e10ccb10</GuidValue>
<Version>1.0</Version>
<Abstract>Component description file for Base Smbus Library.</Abstract>
<Description>SMBUS Library that layers on top of the I/O Library to directly
access a standard SMBUS host controller.</Description>
<Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>
<License>All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
<Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
</MsaHeader>
<ModuleDefinitions>
<SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
<BinaryModule>false</BinaryModule>
<OutputFileBasename>BaseSmbusLib</OutputFileBasename>
</ModuleDefinitions>
<LibraryClassDefinitions>
<LibraryClass Usage="ALWAYS_PRODUCED">
<Keyword>SmbusLib</Keyword>
</LibraryClass>
<LibraryClass Usage="ALWAYS_CONSUMED">
<Keyword>BaseLib</Keyword>
</LibraryClass>
<LibraryClass Usage="ALWAYS_CONSUMED">
<Keyword>IoLib</Keyword>
</LibraryClass>
<LibraryClass Usage="ALWAYS_CONSUMED">
<Keyword>PciLib</Keyword>
</LibraryClass>
<LibraryClass Usage="ALWAYS_CONSUMED">
<Keyword>DebugLib</Keyword>
</LibraryClass>
</LibraryClassDefinitions>
<SourceFiles>
<Filename>SmbusLibRegisters.h</Filename>
<Filename>SmbusLib.c</Filename>
</SourceFiles>
<PackageDependencies>
<Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
</PackageDependencies>
<Externs>
<Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
<Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
</Externs>
</ModuleSurfaceArea>

833
MdePkg/Library/BaseSmbusLib/SmbusLib.c
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@ -1,833 +0,0 @@
/** @file
Base SMBUS library implementation built upon I/O library.
Copyright (c) 2006, Intel Corporation<BR>
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name: SmbusLib.c
**/
#include "SmbusLibRegisters.h"
#define SMBUS_LIB_SLAVE_ADDRESS(SmBusAddress) (((SmBusAddress) >> 1) & 0x7f)
#define SMBUS_LIB_COMMAND(SmBusAddress) (((SmBusAddress) >> 8) & 0xff)
#define SMBUS_LIB_LENGTH(SmBusAddress) (((SmBusAddress) >> 16) & 0x3f)
#define SMBUS_LIB_PEC(SmBusAddress) ((BOOLEAN) (((SmBusAddress) & SMBUS_LIB_PEC_BIT) != 0))
#define SMBUS_LIB_RESEARVED(SmBusAddress) ((SmBusAddress) & ~(((1 << 22) - 2) | SMBUS_LIB_PEC_BIT))
//
// Replaced by PCD
//
#define ICH_SMBUS_IO_BASE_ADDRESS 0xEFA0
/**
Reads an 8-bit register on ICH SMBUS controller.
This internal function reads an SMBUS register specified by Offset.
@param Offset The offset of SMBUS register.
@return The value read.
**/
UINT8
InternalSmBusIoRead8 (
IN UINTN Offset
)
{
return IoRead8 (ICH_SMBUS_IO_BASE_ADDRESS + Offset);
}
/**
Writes an 8-bit register on ICH SMBUS controller.
This internal function writes an SMBUS register specified by Offset.
@param Offset The offset of SMBUS register.
@param Value The value to write to SMBUS register.
@return The value written the SMBUS register.
**/
UINT8
InternalSmBusIoWrite8 (
IN UINTN Offset,
IN UINT8 Value
)
{
return IoWrite8 (ICH_SMBUS_IO_BASE_ADDRESS + Offset, Value);
}
/**
Acquires the ownership of SMBUS.
This internal function reads the host state register.
If the SMBUS is not available, RETURN_TIMEOUT is returned;
Otherwise, it performs some basic initializations and returns
RETURN_SUCCESS.
@retval RETURN_SUCCESS The SMBUS command was executed successfully.
@retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
**/
RETURN_STATUS
InternalSmBusAcquire (
VOID
)
{
UINT8 HostStatus;
HostStatus = InternalSmBusIoRead8 (SMBUS_R_HST_STS);
if ((HostStatus & SMBUS_B_INUSE_STS) != 0) {
return RETURN_TIMEOUT;
} else if ((HostStatus & SMBUS_B_HOST_BUSY) != 0) {
//
// Clear host status register and exit.
//
InternalSmBusIoWrite8 (SMBUS_R_HST_STS, SMBUS_B_HSTS_ALL);
return RETURN_TIMEOUT;
}
//
// Clear out any odd status information (Will Not Clear In Use).
//
InternalSmBusIoWrite8 (SMBUS_R_HST_STS, HostStatus);
return RETURN_SUCCESS;
}
/**
Starts the SMBUS transaction and waits until the end.
This internal function start the SMBUS transaction and waits until the transaction
of SMBUS is over by polling the INTR bit of Host status register.
If the SMBUS is not available, RETURN_TIMEOUT is returned;
Otherwise, it performs some basic initializations and returns
RETURN_SUCCESS.
@param HostControl The Host control command to start SMBUS transaction.
@retval RETURN_SUCCESS The SMBUS command was executed successfully.
@retval RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).
@retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
in the Host Status Register bit. Device errors are
a result of a transaction collision, illegal command field,
unclaimed cycle (host initiated), or bus errors (collisions).
**/
RETURN_STATUS
InternalSmBusStart (
IN UINT8 HostControl
)
{
UINT8 HostStatus;
UINT8 AuxiliaryStatus;
//
// Set Host Control Register (Initiate Operation, Interrupt disabled).
//
InternalSmBusIoWrite8 (SMBUS_R_HST_CTL, HostControl + SMBUS_B_START);
do {
//
// Poll INTR bit of Host Status Register.
//
HostStatus = InternalSmBusIoRead8 (SMBUS_R_HST_STS);
} while ((HostStatus & (SMBUS_B_INTR | SMBUS_B_ERROR | SMBUS_B_BYTE_DONE_STS)) == 0);
if ((HostStatus & SMBUS_B_ERROR) == 0) {
return RETURN_SUCCESS;
}
//
// Clear error bits of Host Status Register.
//
InternalSmBusIoWrite8 (SMBUS_R_HST_STS, SMBUS_B_ERROR);
//
// Read Auxiliary Status Register to judge CRC error.
//
AuxiliaryStatus = InternalSmBusIoRead8 (SMBUS_R_AUX_STS);
if ((AuxiliaryStatus & SMBUS_B_CRCE) != 0) {
return RETURN_CRC_ERROR;
}
return RETURN_DEVICE_ERROR;
}
/**
Executes an SMBUS quick, byte or word command.
This internal function executes an SMBUS quick, byte or word commond.
If Status is not NULL, then the status of the executed command is returned in Status.
@param HostControl The value of Host Control Register to set.
@param SmBusAddress Address that encodes the SMBUS Slave Address,
SMBUS Command, SMBUS Data Length, and PEC.
@param Value The byte/word write to the SMBUS.
@param Status Return status for the executed command.
This is an optional parameter and may be NULL.
@return The byte/word read from the SMBUS.
**/
UINT16
InternalSmBusNonBlock (
IN UINT8 HostControl,
IN UINTN SmBusAddress,
IN UINT16 Value,
OUT RETURN_STATUS *Status
)
{
RETURN_STATUS ReturnStatus;
UINT8 AuxiliaryControl;
//
// Try to acquire the ownership of ICH SMBUS.
//
ReturnStatus = InternalSmBusAcquire ();
if (RETURN_ERROR (ReturnStatus)) {
goto Done;
}
//
// Set the appropriate Host Control Register and auxiliary Control Register.
//
AuxiliaryControl = 0;
if (SMBUS_LIB_PEC (SmBusAddress)) {
AuxiliaryControl |= SMBUS_B_AAC;
HostControl |= SMBUS_B_PEC_EN;
}
//
// Set Host Commond Register.
//
InternalSmBusIoWrite8 (SMBUS_R_HST_CMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));
//
// Write value to Host Data 0 and Host Data 1 Registers.
//
InternalSmBusIoWrite8 (SMBUS_R_HST_D0, (UINT8) Value);
InternalSmBusIoWrite8 (SMBUS_R_HST_D1, (UINT8) (Value >> 8));
//
// Set Auxiliary Control Regiester.
//
InternalSmBusIoWrite8 (SMBUS_R_AUX_CTL, AuxiliaryControl);
//
// Set SMBUS slave address for the device to send/receive from.
//
InternalSmBusIoWrite8 (SMBUS_R_XMIT_SLVA, (UINT8) SmBusAddress);
//
// Start the SMBUS transaction and wait for the end.
//
ReturnStatus = InternalSmBusStart (HostControl);
//
// Read value from Host Data 0 and Host Data 1 Registers.
//
Value = InternalSmBusIoRead8 (SMBUS_R_HST_D1) << 8;
Value |= InternalSmBusIoRead8 (SMBUS_R_HST_D0);
//
// Clear Host Status Register and Auxiliary Status Register.
//
InternalSmBusIoWrite8 (SMBUS_R_HST_STS, SMBUS_B_HSTS_ALL);
InternalSmBusIoWrite8 (SMBUS_R_AUX_STS, SMBUS_B_CRCE);
Done:
if (Status != NULL) {
*Status = ReturnStatus;
}
return Value;
}
/**
Executes an SMBUS quick read command.
Executes an SMBUS quick read command on the SMBUS device specified by SmBusAddress.
Only the SMBUS slave address field of SmBusAddress is required.
If Status is not NULL, then the status of the executed command is returned in Status.
If PEC is set in SmBusAddress, then ASSERT().
If Command in SmBusAddress is not zero, then ASSERT().
If Length in SmBusAddress is not zero, then ASSERT().
If any reserved bits of SmBusAddress are set, then ASSERT().
@param SmBusAddress Address that encodes the SMBUS Slave Address,
SMBUS Command, SMBUS Data Length, and PEC.
@param Status Return status for the executed command.
This is an optional parameter and may be NULL.
**/
VOID
EFIAPI
SmBusQuickRead (
IN UINTN SmBusAddress,
OUT RETURN_STATUS *Status OPTIONAL
)
{
ASSERT (!SMBUS_LIB_PEC (SmBusAddress));
ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
InternalSmBusNonBlock (
SMBUS_V_SMB_CMD_QUICK,
SmBusAddress | SMBUS_B_READ,
0,
Status
);
}
/**
Executes an SMBUS quick write command.
Executes an SMBUS quick write command on the SMBUS device specified by SmBusAddress.
Only the SMBUS slave address field of SmBusAddress is required.
If Status is not NULL, then the status of the executed command is returned in Status.
If PEC is set in SmBusAddress, then ASSERT().
If Command in SmBusAddress is not zero, then ASSERT().
If Length in SmBusAddress is not zero, then ASSERT().
If any reserved bits of SmBusAddress are set, then ASSERT().
@param SmBusAddress Address that encodes the SMBUS Slave Address,
SMBUS Command, SMBUS Data Length, and PEC.
@param Status Return status for the executed command.
This is an optional parameter and may be NULL.
**/
VOID
EFIAPI
SmBusQuickWrite (
IN UINTN SmBusAddress,
OUT RETURN_STATUS *Status OPTIONAL
)
{
ASSERT (!SMBUS_LIB_PEC (SmBusAddress));
ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
InternalSmBusNonBlock (
SMBUS_V_SMB_CMD_QUICK,
SmBusAddress | SMBUS_B_WRITE,
0,
Status
);
}
/**
Executes an SMBUS receive byte command.
Executes an SMBUS receive byte command on the SMBUS device specified by SmBusAddress.
Only the SMBUS slave address field of SmBusAddress is required.
The byte received from the SMBUS is returned.
If Status is not NULL, then the status of the executed command is returned in Status.
If Command in SmBusAddress is not zero, then ASSERT().
If Length in SmBusAddress is not zero, then ASSERT().
If any reserved bits of SmBusAddress are set, then ASSERT().
@param SmBusAddress Address that encodes the SMBUS Slave Address,
SMBUS Command, SMBUS Data Length, and PEC.
@param Status Return status for the executed command.
This is an optional parameter and may be NULL.
@return The byte received from the SMBUS.
**/
UINT8
EFIAPI
SmBusReceiveByte (
IN UINTN SmBusAddress,
OUT RETURN_STATUS *Status OPTIONAL
)
{
ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
return (UINT8) InternalSmBusNonBlock (
SMBUS_V_SMB_CMD_BYTE,
SmBusAddress | SMBUS_B_READ,
0,
Status
);
}
/**
Executes an SMBUS send byte command.
Executes an SMBUS send byte command on the SMBUS device specified by SmBusAddress.
The byte specified by Value is sent.
Only the SMBUS slave address field of SmBusAddress is required. Value is returned.
If Status is not NULL, then the status of the executed command is returned in Status.
If Command in SmBusAddress is not zero, then ASSERT().
If Length in SmBusAddress is not zero, then ASSERT().
If any reserved bits of SmBusAddress are set, then ASSERT().
@param SmBusAddress Address that encodes the SMBUS Slave Address,
SMBUS Command, SMBUS Data Length, and PEC.
@param Value The 8-bit value to send.
@param Status Return status for the executed command.
This is an optional parameter and may be NULL.
@return The parameter of Value.
**/
UINT8
EFIAPI
SmBusSendByte (
IN UINTN SmBusAddress,
IN UINT8 Value,
OUT RETURN_STATUS *Status OPTIONAL
)
{
ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
return (UINT8) InternalSmBusNonBlock (
SMBUS_V_SMB_CMD_BYTE,
SmBusAddress | SMBUS_B_WRITE,
Value,
Status
);
}
/**
Executes an SMBUS read data byte command.
Executes an SMBUS read data byte command on the SMBUS device specified by SmBusAddress.
Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
The 8-bit value read from the SMBUS is returned.
If Status is not NULL, then the status of the executed command is returned in Status.
If Length in SmBusAddress is not zero, then ASSERT().
If any reserved bits of SmBusAddress are set, then ASSERT().
@param SmBusAddress Address that encodes the SMBUS Slave Address,
SMBUS Command, SMBUS Data Length, and PEC.
@param Status Return status for the executed command.
This is an optional parameter and may be NULL.
@return The byte read from the SMBUS.
**/
UINT8
EFIAPI
SmBusReadDataByte (
IN UINTN SmBusAddress,
OUT RETURN_STATUS *Status OPTIONAL
)
{
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
return (UINT8) InternalSmBusNonBlock (
SMBUS_V_SMB_CMD_BYTE_DATA,
SmBusAddress | SMBUS_B_READ,
0,
Status
);
}
/**
Executes an SMBUS write data byte command.
Executes an SMBUS write data byte command on the SMBUS device specified by SmBusAddress.
The 8-bit value specified by Value is written.
Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
Value is returned.
If Status is not NULL, then the status of the executed command is returned in Status.
If Length in SmBusAddress is not zero, then ASSERT().
If any reserved bits of SmBusAddress are set, then ASSERT().
@param SmBusAddress Address that encodes the SMBUS Slave Address,
SMBUS Command, SMBUS Data Length, and PEC.
@param Value The 8-bit value to write.
@param Status Return status for the executed command.
This is an optional parameter and may be NULL.
@return The parameter of Value.
**/
UINT8
EFIAPI
SmBusWriteDataByte (
IN UINTN SmBusAddress,
IN UINT8 Value,
OUT RETURN_STATUS *Status OPTIONAL
)
{
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
return (UINT8) InternalSmBusNonBlock (
SMBUS_V_SMB_CMD_BYTE_DATA,
SmBusAddress | SMBUS_B_WRITE,
Value,
Status
);
}
/**
Executes an SMBUS read data word command.
Executes an SMBUS read data word command on the SMBUS device specified by SmBusAddress.
Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
The 16-bit value read from the SMBUS is returned.
If Status is not NULL, then the status of the executed command is returned in Status.
If Length in SmBusAddress is not zero, then ASSERT().
If any reserved bits of SmBusAddress are set, then ASSERT().
@param SmBusAddress Address that encodes the SMBUS Slave Address,
SMBUS Command, SMBUS Data Length, and PEC.
@param Status Return status for the executed command.
This is an optional parameter and may be NULL.
@return The byte read from the SMBUS.
**/
UINT16
EFIAPI
SmBusReadDataWord (
IN UINTN SmBusAddress,
OUT RETURN_STATUS *Status OPTIONAL
)
{
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
return InternalSmBusNonBlock (
SMBUS_V_SMB_CMD_WORD_DATA,
SmBusAddress | SMBUS_B_READ,
0,
Status
);
}
/**
Executes an SMBUS write data word command.
Executes an SMBUS write data word command on the SMBUS device specified by SmBusAddress.
The 16-bit value specified by Value is written.
Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
Value is returned.
If Status is not NULL, then the status of the executed command is returned in Status.
If Length in SmBusAddress is not zero, then ASSERT().
If any reserved bits of SmBusAddress are set, then ASSERT().
@param SmBusAddress Address that encodes the SMBUS Slave Address,
SMBUS Command, SMBUS Data Length, and PEC.
@param Value The 16-bit value to write.
@param Status Return status for the executed command.
This is an optional parameter and may be NULL.
@return The parameter of Value.
**/
UINT16
EFIAPI
SmBusWriteDataWord (
IN UINTN SmBusAddress,
IN UINT16 Value,
OUT RETURN_STATUS *Status OPTIONAL
)
{
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
return InternalSmBusNonBlock (
SMBUS_V_SMB_CMD_WORD_DATA,
SmBusAddress | SMBUS_B_WRITE,
Value,
Status
);
}
/**
Executes an SMBUS process call command.
Executes an SMBUS process call command on the SMBUS device specified by SmBusAddress.
The 16-bit value specified by Value is written.
Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
The 16-bit value returned by the process call command is returned.
If Status is not NULL, then the status of the executed command is returned in Status.
If Length in SmBusAddress is not zero, then ASSERT().
If any reserved bits of SmBusAddress are set, then ASSERT().
@param SmBusAddress Address that encodes the SMBUS Slave Address,
SMBUS Command, SMBUS Data Length, and PEC.
@param Value The 16-bit value to write.
@param Status Return status for the executed command.
This is an optional parameter and may be NULL.
@return The 16-bit value returned by the process call command.
**/
UINT16
EFIAPI
SmBusProcessCall (
IN UINTN SmBusAddress,
IN UINT16 Value,
OUT RETURN_STATUS *Status OPTIONAL
)
{
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
return InternalSmBusNonBlock (
SMBUS_V_SMB_CMD_PROCESS_CALL,
SmBusAddress | SMBUS_B_WRITE,
Value,
Status
);
}
/**
Executes an SMBUS block command.
Executes an SMBUS block read, block write and block write-block read command
on the SMBUS device specified by SmBusAddress.
Bytes are read from the SMBUS and stored in Buffer.
The number of bytes read is returned, and will never return a value larger than 32-bytes.
If Status is not NULL, then the status of the executed command is returned in Status.
It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.
@param HostControl The value of Host Control Register to set.
@param SmBusAddress Address that encodes the SMBUS Slave Address,
SMBUS Command, SMBUS Data Length, and PEC.
@param WriteBuffer Pointer to the buffer of bytes to write to the SMBUS.
@param ReadBuffer Pointer to the buffer of bytes to read from the SMBUS.
@param Status Return status for the executed command.
This is an optional parameter and may be NULL.
@return The number of bytes read from the SMBUS.
**/
UINTN
InternalSmBusBlock (
IN UINT8 HostControl,
IN UINTN SmBusAddress,
IN UINT8 *WriteBuffer,
OUT UINT8 *ReadBuffer,
OUT RETURN_STATUS *Status
)
{
RETURN_STATUS ReturnStatus;
UINTN Index;
UINTN BytesCount;
UINT8 AuxiliaryControl;
BytesCount = SMBUS_LIB_LENGTH (SmBusAddress);
//
// Try to acquire the ownership of ICH SMBUS.
//
ReturnStatus = InternalSmBusAcquire ();
if (RETURN_ERROR (ReturnStatus)) {
goto Done;
}
//
// Set the appropriate Host Control Register and auxiliary Control Register.
//
AuxiliaryControl = SMBUS_B_E32B;
if (SMBUS_LIB_PEC (SmBusAddress)) {
AuxiliaryControl |= SMBUS_B_AAC;
HostControl |= SMBUS_B_PEC_EN;
}
//
// Set Host Command Register.
//
InternalSmBusIoWrite8 (SMBUS_R_HST_CMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));
//
// Set Auxiliary Control Regiester.
//
InternalSmBusIoWrite8 (SMBUS_R_AUX_CTL, AuxiliaryControl);
//
// Clear byte pointer of 32-byte buffer.
//
InternalSmBusIoRead8 (SMBUS_R_HST_CTL);
if (WriteBuffer != NULL) {
//
// Write the number of block to Host Block Data Byte Register.
//
InternalSmBusIoWrite8 (SMBUS_R_HST_D0, (UINT8) BytesCount);
//
// Write data block to Host Block Data Register.
//
for (Index = 0; Index < BytesCount; Index++) {
InternalSmBusIoWrite8 (SMBUS_R_HOST_BLOCK_DB, WriteBuffer[Index]);
}
}
//
// Set SMBUS slave address for the device to send/receive from.
//
InternalSmBusIoWrite8 (SMBUS_R_XMIT_SLVA, (UINT8) SmBusAddress);
//
// Start the SMBUS transaction and wait for the end.
//
ReturnStatus = InternalSmBusStart (HostControl);
if (RETURN_ERROR (ReturnStatus)) {
goto Done;
}
if (ReadBuffer != NULL) {
//
// Read the number of block from host block data byte register.
//
BytesCount = InternalSmBusIoRead8 (SMBUS_R_HST_D0);
//
// Write data block from Host Block Data Register.
//
for (Index = 0; Index < BytesCount; Index++) {
ReadBuffer[Index] = InternalSmBusIoRead8 (SMBUS_R_HOST_BLOCK_DB);
}
}
//
// Clear Host Status Register and Auxiliary Status Register.
//
InternalSmBusIoWrite8 (SMBUS_R_HST_STS, SMBUS_B_HSTS_ALL);
InternalSmBusIoWrite8 (SMBUS_R_AUX_STS, SMBUS_B_CRCE);
Done:
if (Status != NULL) {
*Status = ReturnStatus;
}
return BytesCount;
}
/**
Executes an SMBUS read block command.
Executes an SMBUS read block command on the SMBUS device specified by SmBusAddress.
Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
Bytes are read from the SMBUS and stored in Buffer.
The number of bytes read is returned, and will never return a value larger than 32-bytes.
If Status is not NULL, then the status of the executed command is returned in Status.
It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.
If Length in SmBusAddress is not zero, then ASSERT().
If Buffer is NULL, then ASSERT().
If any reserved bits of SmBusAddress are set, then ASSERT().
@param SmBusAddress Address that encodes the SMBUS Slave Address,
SMBUS Command, SMBUS Data Length, and PEC.
@param Buffer Pointer to the buffer to store the bytes read from the SMBUS.
@param Status Return status for the executed command.
This is an optional parameter and may be NULL.
@return The number of bytes read.
**/
UINTN
EFIAPI
SmBusReadBlock (
IN UINTN SmBusAddress,
OUT VOID *Buffer,
OUT RETURN_STATUS *Status OPTIONAL
)
{
ASSERT (Buffer != NULL);
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
return InternalSmBusBlock (
SMBUS_V_SMB_CMD_BLOCK,
SmBusAddress | SMBUS_B_READ,
NULL,
Buffer,
Status
);
}
/**
Executes an SMBUS write block command.
Executes an SMBUS write block command on the SMBUS device specified by SmBusAddress.
The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.
Bytes are written to the SMBUS from Buffer.
The number of bytes written is returned, and will never return a value larger than 32-bytes.
If Status is not NULL, then the status of the executed command is returned in Status.
If Length in SmBusAddress is zero or greater than 32, then ASSERT().
If Buffer is NULL, then ASSERT().
If any reserved bits of SmBusAddress are set, then ASSERT().
@param SmBusAddress Address that encodes the SMBUS Slave Address,
SMBUS Command, SMBUS Data Length, and PEC.
@param Buffer Pointer to the buffer to store the bytes read from the SMBUS.
@param Status Return status for the executed command.
This is an optional parameter and may be NULL.
@return The number of bytes written.
**/
UINTN
EFIAPI
SmBusWriteBlock (
IN UINTN SmBusAddress,
OUT VOID *Buffer,
OUT RETURN_STATUS *Status OPTIONAL
)
{
ASSERT (Buffer != NULL);
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
return InternalSmBusBlock (
SMBUS_V_SMB_CMD_BLOCK,
SmBusAddress | SMBUS_B_WRITE,
Buffer,
NULL,
Status
);
}
/**
Executes an SMBUS block process call command.
Executes an SMBUS block process call command on the SMBUS device specified by SmBusAddress.
The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.
Bytes are written to the SMBUS from WriteBuffer. Bytes are then read from the SMBUS into ReadBuffer.
If Status is not NULL, then the status of the executed command is returned in Status.
It is the caller's responsibility to make sure ReadBuffer is large enough for the total number of bytes read.
SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.
If Length in SmBusAddress is zero or greater than 32, then ASSERT().
If WriteBuffer is NULL, then ASSERT().
If ReadBuffer is NULL, then ASSERT().
If any reserved bits of SmBusAddress are set, then ASSERT().
@param SmBusAddress Address that encodes the SMBUS Slave Address,
SMBUS Command, SMBUS Data Length, and PEC.
@param WriteBuffer Pointer to the buffer of bytes to write to the SMBUS.
@param ReadBuffer Pointer to the buffer of bytes to read from the SMBUS.
@param Status Return status for the executed command.
This is an optional parameter and may be NULL.
@return The number of bytes written.
**/
UINTN
EFIAPI
SmBusBlockProcessCall (
IN UINTN SmBusAddress,
IN VOID *WriteBuffer,
OUT VOID *ReadBuffer,
OUT RETURN_STATUS *Status OPTIONAL
)
{
ASSERT (WriteBuffer != NULL);
ASSERT (ReadBuffer != NULL);
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);
ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);
ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
return InternalSmBusBlock (
SMBUS_V_SMB_CMD_BLOCK_PROCESS,
SmBusAddress | SMBUS_B_WRITE,
WriteBuffer,
ReadBuffer,
Status
);
}

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MdePkg/Library/BaseSmbusLib/SmbusLibRegisters.h
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@ -1,120 +0,0 @@
/** @file
Base SMBUS library implementation built upon I/O library.
Copyright (c) 2006, Intel Corporation<BR>
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name: SmbusLib.h
**/
#ifndef __SMBUS_LIB_REGISTER_H
#define __SMBUS_LIB_REGISTER_H
#define SMBUS_R_HST_STS 0x00 // Host Status Register
#define SMBUS_B_HOST_BUSY 0x01 // RO
#define SMBUS_B_INTR 0x02 // R/WC
#define SMBUS_B_DEV_ERR 0x04 // R/WC
#define SMBUS_B_BUS_ERR 0x08 // R/WC
#define SMBUS_B_FAILED 0x10 // R/WC
#define SMBUS_B_SMBALERT_STS 0x20 // R/WC
#define SMBUS_B_INUSE_STS 0x40 // R/WC
#define SMBUS_B_BYTE_DONE_STS 0x80 // R/WC
#define SMBUS_B_ERROR (SMBUS_B_DEV_ERR | SMBUS_B_BUS_ERR | SMBUS_B_FAILED)
#define SMBUS_B_HSTS_ALL 0xFF // R/WC
#define SMBUS_R_HST_CTL 0x02 // Host Control Register R/W
#define SMBUS_B_INTREN 0x01 // RW
#define SMBUS_B_KILL 0x02 // RW
#define SMBUS_B_CMD (7 << 2) // RW
#define SMBUS_V_SMB_CMD_QUICK (0 << 2)
#define SMBUS_V_SMB_CMD_BYTE (1 << 2)
#define SMBUS_V_SMB_CMD_BYTE_DATA (2 << 2)
#define SMBUS_V_SMB_CMD_WORD_DATA (3 << 2)
#define SMBUS_V_SMB_CMD_PROCESS_CALL (4 << 2)
#define SMBUS_V_SMB_CMD_BLOCK (5 << 2)
#define SMBUS_V_SMB_CMD_IIC_READ (6 << 2)
#define SMBUS_V_SMB_CMD_BLOCK_PROCESS (7 << 2)
#define SMBUS_B_LAST_BYTE 0x20 // WO
#define SMBUS_B_START 0x40 // WO
#define SMBUS_B_PEC_EN 0x80 // RW
#define SMBUS_R_HST_CMD 0x03 // Host Command Register R/W
#define SMBUS_R_XMIT_SLVA 0x04 // Transmit Slave Address Register R/W
#define SMBUS_B_RW 0x01 // RW
#define SMBUS_B_READ 0x01 // RW
#define SMBUS_B_WRITE 0x00 // RW
#define SMBUS_B_ADDRESS 0xFE // RW
#define SMBUS_R_HST_D0 0x05 // Data 0 Register R/W
#define SMBUS_R_HST_D1 0x06 // Data 1 Register R/W
#define SMBUS_R_HOST_BLOCK_DB 0x07 // Host Block Data Register R/W
#define SMBUS_R_PEC 0x08 // Packet Error Check Data Register R/W
#define SMBUS_R_RCV_SLVA 0x09 // Receive Slave Address Register R/W
#define SMBUS_B_SLAVE_ADDR 0x7F // RW
#define SMBUS_R_SLV_DATA 0x0A // Receive Slave Data Register R/W
#define SMBUS_R_AUX_STS 0x0C // Auxiliary Status Register R/WC
#define SMBUS_B_CRCE 0x01 // R/WC
#define SMBUS_R_AUX_CTL 0x0D // Auxiliary Control Register R/W
#define SMBUS_B_AAC 0x01 // R/W
#define SMBUS_B_E32B 0x02 // R/W
#define SMBUS_R_SMLINK_PIN_CTL 0x0E // SMLINK Pin Control Register R/W
#define SMBUS_B_SMLINK0_CUR_STS 0x01 // RO
#define SMBUS_B_SMLINK1_CUR_STS 0x02 // RO
#define SMBUS_B_SMLINK_CLK_CTL 0x04 // RW
#define SMBUS_R_SMBUS_PIN_CTL 0x0F // SMBus Pin Control Register R/W
#define SMBUS_B_SMBCLK_CUR_STS 0x01 // RO
#define SMBUS_B_SMBDATA_CUR_STS 0x02 // RO
#define SMBUS_B_SMBCLK_CTL 0x04 // RW
#define SMBUS_R_SLV_STS 0x10 // Slave Status Register R/WC
#define SMBUS_B_HOST_NOTIFY_STS 0x01 // R/WC
#define SMBUS_R_SLV_CMD 0x11 // Slave Command Register R/W
#define SMBUS_B_HOST_NOTIFY_INTREN 0x01 // R/W
#define SMBUS_B_HOST_NOTIFY_WKEN 0x02 // R/W
#define SMBUS_B_SMBALERT_DIS 0x04 // R/W
#define SMBUS_R_NOTIFY_DADDR 0x14 // Notify Device Address Register RO
#define SMBUS_B_DEVICE_ADDRESS 0xFE // RO
#define SMBUS_R_NOTIFY_DLOW 0x16 // Notify Data Low Byte Register RO
#define SMBUS_R_NOTIFY_DHIGH 0x17 // Notify Data High Byte Register RO
#endif