mirror of https://github.com/acidanthera/audk.git
OvmfPkg: PlatformPei: clear CMOS 0xF after setting mBootMode
We have an old bug in BootModeInitialization(): firmware is supposed to clear the CMOS register 0xF after reading it for the last time. QEMU only sets this register to 0xFE in "hw/timer/mc146818rtc.c", function rtc_notify_suspend(), and never clears it. However, SeaBIOS does clear it in "src/post.c" and "src/resume.c", so let's follow suit. We've never noticed this until now because the register gets mysteriously cleared on non-resume reboots when OVMF runs on qemu-system-x86_64. But on qemu-system-i386, this bug breaks a (suspend, resume, reboot) triplet: after the last step OVMF thinks it's resuming because when it actually resumed (in the middle step), it failed to clear the register. BootModeInitialization() is the perfect function to clear the register, right after setting mBootMode: the function is executed on both normal boot and on S3 resume; it succeeds DebugDumpCmos() -- so the dump is not affected by this patch --; and everything that relies on S3 vs. normal boot after we clear the register uses mBootMode anyway. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18391 6f19259b-4bc3-4df7-8a09-765794883524
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@ -322,6 +322,7 @@ BootModeInitialization (
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if (CmosRead8 (0xF) == 0xFE) {
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if (CmosRead8 (0xF) == 0xFE) {
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mBootMode = BOOT_ON_S3_RESUME;
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mBootMode = BOOT_ON_S3_RESUME;
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}
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}
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CmosWrite8 (0xF, 0x00);
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Status = PeiServicesSetBootMode (mBootMode);
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Status = PeiServicesSetBootMode (mBootMode);
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ASSERT_EFI_ERROR (Status);
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ASSERT_EFI_ERROR (Status);
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