mirror of https://github.com/acidanthera/audk.git
MdeModulePkg/PciSioSerialDxe: Do not flush the UART
The patch aligns to the IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe driver not flush the UART in Reset() and SetAttributes() function. It was found the flush causes hang on certain PCI serial devices. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Eric Jin <eric.jin@intel.com>
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@ -1,7 +1,7 @@
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/** @file
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SerialIo implementation for PCI or SIO UARTs.
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Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -442,27 +442,6 @@ SerialReceiveTransmit (
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return EFI_SUCCESS;
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}
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/**
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Flush the serial hardware transmit FIFO and shift register.
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@param SerialDevice The device to flush.
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**/
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VOID
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SerialFlushTransmitFifo (
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SERIAL_DEV *SerialDevice
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)
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{
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SERIAL_PORT_LSR Lsr;
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//
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// Wait for the serial port to be ready, to make sure both the transmit FIFO
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// and shift register empty.
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//
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do {
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Lsr.Data = READ_LSR (SerialDevice);
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} while (Lsr.Bits.Temt == 0);
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}
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//
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// Interface Functions
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//
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@ -503,8 +482,6 @@ SerialReset (
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Tpl = gBS->RaiseTPL (TPL_NOTIFY);
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SerialFlushTransmitFifo (SerialDevice);
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//
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// Make sure DLAB is 0.
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//
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@ -683,8 +660,6 @@ SerialSetAttributes (
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Tpl = gBS->RaiseTPL (TPL_NOTIFY);
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SerialFlushTransmitFifo (SerialDevice);
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//
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// Put serial port on Divisor Latch Mode
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//
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