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ShellPkg: acpiview: MADT: Remove redundant forward declarations

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Remove redundant forward function declarations by repositioning
blocks of code. This way the code structure is consistent across
ACPI table parsers and the code becomes more concise.

Signed-off-by: Krzysztof Koch <krzysztof.koch@arm.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
This commit is contained in:
Krzysztof Koch 2019-07-18 18:04:59 -07:00 committed by Jaben Carsey
parent 527a36859d
commit 9cb5bcce9a
1 changed files with 44 additions and 74 deletions
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118
ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c
View File

@ -35,7 +35,15 @@ EFIAPI
ValidateGICDSystemVectorBase (
IN UINT8* Ptr,
IN VOID* Context
);
)
{
if (*(UINT32*)Ptr != 0) {
IncrementErrorCount ();
Print (
L"\nERROR: System Vector Base must be zero."
);
}
}
/**
This function validates the SPE Overflow Interrupt in the GICC.
@ -50,7 +58,41 @@ EFIAPI
ValidateSpeOverflowInterrupt (
IN UINT8* Ptr,
IN VOID* Context
);
)
{
UINT16 SpeOverflowInterrupt;
SpeOverflowInterrupt = *(UINT16*)Ptr;
// SPE not supported by this processor
if (SpeOverflowInterrupt == 0) {
return;
}
if ((SpeOverflowInterrupt < ARM_PPI_ID_MIN) ||
((SpeOverflowInterrupt > ARM_PPI_ID_MAX) &&
(SpeOverflowInterrupt < ARM_PPI_ID_EXTENDED_MIN)) ||
(SpeOverflowInterrupt > ARM_PPI_ID_EXTENDED_MAX)) {
IncrementErrorCount ();
Print (
L"\nERROR: SPE Overflow Interrupt ID of %d is not in the allowed PPI ID "
L"ranges of %d-%d or %d-%d (for GICv3.1 or later).",
SpeOverflowInterrupt,
ARM_PPI_ID_MIN,
ARM_PPI_ID_MAX,
ARM_PPI_ID_EXTENDED_MIN,
ARM_PPI_ID_EXTENDED_MAX
);
} else if (SpeOverflowInterrupt != ARM_PPI_ID_PMBIRQ) {
IncrementWarningCount();
Print (
L"\nWARNING: SPE Overflow Interrupt ID of %d is not compliant with SBSA "
L"Level 3 PPI ID assignment: %d.",
SpeOverflowInterrupt,
ARM_PPI_ID_PMBIRQ
);
}
}
/**
An ACPI_PARSER array describing the GICC Interrupt Controller Structure.
@ -158,78 +200,6 @@ STATIC CONST ACPI_PARSER MadtInterruptControllerHeaderParser[] = {
{L"Reserved", 2, 2, NULL, NULL, NULL, NULL, NULL}
};
/**
This function validates the System Vector Base in the GICD.
@param [in] Ptr Pointer to the start of the field data.
@param [in] Context Pointer to context specific information e.g. this
could be a pointer to the ACPI table header.
**/
STATIC
VOID
EFIAPI
ValidateGICDSystemVectorBase (
IN UINT8* Ptr,
IN VOID* Context
)
{
if (*(UINT32*)Ptr != 0) {
IncrementErrorCount ();
Print (
L"\nERROR: System Vector Base must be zero."
);
}
}
/**
This function validates the SPE Overflow Interrupt in the GICC.
@param [in] Ptr Pointer to the start of the field data.
@param [in] Context Pointer to context specific information e.g. this
could be a pointer to the ACPI table header.
**/
STATIC
VOID
EFIAPI
ValidateSpeOverflowInterrupt (
IN UINT8* Ptr,
IN VOID* Context
)
{
UINT16 SpeOverflowInterrupt;
SpeOverflowInterrupt = *(UINT16*)Ptr;
// SPE not supported by this processor
if (SpeOverflowInterrupt == 0) {
return;
}
if ((SpeOverflowInterrupt < ARM_PPI_ID_MIN) ||
((SpeOverflowInterrupt > ARM_PPI_ID_MAX) &&
(SpeOverflowInterrupt < ARM_PPI_ID_EXTENDED_MIN)) ||
(SpeOverflowInterrupt > ARM_PPI_ID_EXTENDED_MAX)) {
IncrementErrorCount ();
Print (
L"\nERROR: SPE Overflow Interrupt ID of %d is not in the allowed PPI ID "
L"ranges of %d-%d or %d-%d (for GICv3.1 or later).",
SpeOverflowInterrupt,
ARM_PPI_ID_MIN,
ARM_PPI_ID_MAX,
ARM_PPI_ID_EXTENDED_MIN,
ARM_PPI_ID_EXTENDED_MAX
);
} else if (SpeOverflowInterrupt != ARM_PPI_ID_PMBIRQ) {
IncrementWarningCount();
Print (
L"\nWARNING: SPE Overflow Interrupt ID of %d is not compliant with SBSA "
L"Level 3 PPI ID assignment: %d.",
SpeOverflowInterrupt,
ARM_PPI_ID_PMBIRQ
);
}
}
/**
This function parses the ACPI MADT table.
When trace is enabled this function parses the MADT table and