From 9d1a9b426ed109fce87e487878b1865713cf4d3e Mon Sep 17 00:00:00 2001 From: Ard Biesheuvel Date: Thu, 16 Jan 2025 18:48:47 +0100 Subject: [PATCH] ArmPkg/ArmGic: Implement GICv3+ version of GIC driver Most platforms do not require the flexibility of the ordinary GIC driver, which supports both GICv2 and GICv3+, and decides at runtime which version to use. So expose a GICv3+ version, which only supports a GICv3 or newer. Signed-off-by: Ard Biesheuvel --- ArmPkg/ArmPkg.dsc | 1 + ArmPkg/Drivers/ArmGic/ArmGicV3Dxe.inf | 57 +++++++++++++++++++++++ ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c | 7 +++ 3 files changed, 65 insertions(+) create mode 100644 ArmPkg/Drivers/ArmGic/ArmGicV3Dxe.inf diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc index aae04a8aa8..ecfbada222 100644 --- a/ArmPkg/ArmPkg.dsc +++ b/ArmPkg/ArmPkg.dsc @@ -126,6 +126,7 @@ ArmPkg/Drivers/CpuPei/CpuPei.inf ArmPkg/Drivers/ArmGic/ArmGicDxe.inf ArmPkg/Drivers/ArmGic/ArmGicV2Dxe.inf + ArmPkg/Drivers/ArmGic/ArmGicV3Dxe.inf ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf ArmPkg/Drivers/TimerDxe/TimerDxe.inf diff --git a/ArmPkg/Drivers/ArmGic/ArmGicV3Dxe.inf b/ArmPkg/Drivers/ArmGic/ArmGicV3Dxe.inf new file mode 100644 index 0000000000..9136677084 --- /dev/null +++ b/ArmPkg/Drivers/ArmGic/ArmGicV3Dxe.inf @@ -0,0 +1,57 @@ +#/** @file +# +# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
+# Copyright (c) 2012 - 2017, ARM Ltd. All rights reserved.
+# Copyright (c) 2025, Google LLC. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#**/ + +[Defines] + INF_VERSION = 1.30 + BASE_NAME = ArmGicV3Dxe + FILE_GUID = 953ff472-9b9e-4058-84cf-227daf89dc82 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = GicV3DxeInitialize + +[Sources.common] + ArmGicCommonDxe.c + ArmGicDxe.c + ArmGicDxe.h + GicV3/ArmGicV3Dxe.c + +[Sources.ARM] + GicV3/Arm/ArmGicV3.S | GCC + +[Sources.AARCH64] + GicV3/AArch64/ArmGicV3.S + +[Packages] + MdePkg/MdePkg.dec + EmbeddedPkg/EmbeddedPkg.dec + ArmPkg/ArmPkg.dec + +[LibraryClasses] + ArmLib + BaseLib + DebugLib + IoLib + PcdLib + PrintLib + UefiBootServicesTableLib + UefiDriverEntryPoint + UefiLib + +[Protocols] + gHardwareInterruptProtocolGuid ## PRODUCES + gHardwareInterrupt2ProtocolGuid ## PRODUCES + gEfiCpuArchProtocolGuid ## CONSUMES ## NOTIFY + +[Pcd.common] + gArmTokenSpaceGuid.PcdGicDistributorBase + gArmTokenSpaceGuid.PcdGicRedistributorsBase + +[Depex] + TRUE diff --git a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c b/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c index be5134da43..2b6c0fc9f1 100644 --- a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c +++ b/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c @@ -628,6 +628,7 @@ GicV3DxeInitialize ( UINTN Index; UINT64 MpId; UINT64 CpuTarget; + UINT64 RegValue; // Make sure the Interrupt Controller Protocol is not already installed in // the system. @@ -637,6 +638,12 @@ GicV3DxeInitialize ( mGicRedistributorsBase = PcdGet64 (PcdGicRedistributorsBase); mGicNumInterrupts = ArmGicGetMaxNumInterrupts (mGicDistributorBase); + RegValue = ArmGicV3GetControlSystemRegisterEnable (); + if ((RegValue & ICC_SRE_EL2_SRE) == 0) { + ArmGicV3SetControlSystemRegisterEnable (RegValue | ICC_SRE_EL2_SRE); + ASSERT ((ArmGicV3GetControlSystemRegisterEnable () & ICC_SRE_EL2_SRE) != 0); + } + // We will be driving this GIC in native v3 mode, i.e., with Affinity // Routing enabled. So ensure that the ARE bit is set. MmioOr32 (mGicDistributorBase + ARM_GIC_ICDDCR, ARM_GIC_ICDDCR_ARE);