ArmPkg/ArmCpuLib: Fixed SMP Cortex-A9 and Cortex-A15

Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13261 6f19259b-4bc3-4df7-8a09-765794883524

ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.c

@@ -20,7 +20,7 @@
 #include <Library/IoLib.h>
 #include <Library/PcdLib.h>
 
-#include <Chipset/ArmV7.h>
+#include <Chipset/ArmCortexA15.h>
 
 VOID
 ArmCpuSetup (
@@ -41,10 +41,11 @@ ArmCpuSetup (
   // if security extensions are implemented.
   ArmArchTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz));
 
-  /*// If MPCore then Enable the SCU
   if (ArmIsMpCore()) {
-    ArmEnableScu ();
-  }*/
+    // Turn on SMP coherency
+    ArmSetAuxCrBit (A15_FEATURE_SMP);
+  }
+
 }
 
 
@@ -53,8 +54,6 @@ ArmCpuSetupSmpNonSecure (
   IN  UINTN         MpId
   )
 {
-  //ArmSetAuxCrBit (A15_FEATURE_SMP);
-
   /*// Make the SCU accessible in Non Secure world
   if (IS_PRIMARY_CORE(MpId)) {
     ScuBase = ArmGetScuBaseAddress();

ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.c

@@ -48,6 +48,9 @@ ArmCpuSetup (
 
   // If MPCore then Enable the SCU
   if (ArmIsMpCore()) {
+    // Signals the Cortex-A9 processor is taking part in coherency
+    ArmSetAuxCrBit (A9_FEATURE_SMP);
+
     ArmEnableScu ();
   }
 }
@@ -60,8 +63,6 @@ ArmCpuSetupSmpNonSecure (
 {
   INTN          ScuBase;
 
-  ArmSetAuxCrBit (A9_FEATURE_SMP);
-
   // Make the SCU accessible in Non Secure world
   if (IS_PRIMARY_CORE(MpId)) {
     ScuBase = ArmGetScuBaseAddress();

ArmPkg/Include/Chipset/ArmCortexA15.h

@@ -0,0 +1,25 @@
+/** @file
+
+  Copyright (c) 2012, ARM Limited. All rights reserved.
+
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __ARM_CORTEX_A15_H__
+#define __ARM_CORTEX_A15_H__
+
+#include <Chipset/ArmV7.h>
+
+//
+// Cortex A15 feature bit definitions
+//
+#define A15_FEATURE_SMP     (1<<6)
+
+#endif