mirror of https://github.com/acidanthera/audk.git
ArmPlatformPkg/SP804TimerLib: Fixed macro timer base addresses
The base address for the Metronome and Performance timer were reverted. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12162 6f19259b-4bc3-4df7-8a09-765794883524
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@ -21,8 +21,8 @@
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#include <Library/IoLib.h>
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#include <Drivers/SP804Timer.h>
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#define SP804_TIMER_METRONOME_BASE (UINTN)PcdGet32 (PcdSP804TimerPerformanceBase)
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#define SP804_TIMER_PERFORMANCE_BASE (UINTN)PcdGet32 (PcdSP804TimerMetronomeBase)
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#define SP804_TIMER_METRONOME_BASE ((UINTN)PcdGet32 (PcdSP804TimerMetronomeBase))
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#define SP804_TIMER_PERFORMANCE_BASE ((UINTN)PcdGet32 (PcdSP804TimerPerformanceBase))
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// Setup SP810's Timer2 for managing delay functions. And Timer3 for Performance counter
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// Note: ArmVE's Timer0 and Timer1 are used by TimerDxe.
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@ -32,11 +32,11 @@ TimerConstructor (
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VOID
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)
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{
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// Check if Timer 2 is already initialized
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// Check if the Metronome Timer is already initialized
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if (MmioRead32(SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
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return RETURN_SUCCESS;
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} else {
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// Configure timer 2 for one shot operation, 32 bits, no prescaler, and interrupt disabled
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// Configure the Metronome Timer for one shot operation, 32 bits, no prescaler, and interrupt disabled
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MmioOr32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ONESHOT | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
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// Preload the timer count register
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@ -46,14 +46,14 @@ TimerConstructor (
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MmioOr32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
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}
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// Check if Timer 3 is already initialized
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// Check if the Performance Timer is already initialized
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if (MmioRead32(SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
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return RETURN_SUCCESS;
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} else {
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// Configure timer 3 for free running operation, 32 bits, no prescaler, interrupt disabled
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// Configure the Performance timer for free running operation, 32 bits, no prescaler, interrupt disabled
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MmioOr32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
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// Enable the timer
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// Start the Performance Timer ticking
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MmioOr32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
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}
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