mirror of
https://github.com/acidanthera/audk.git
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Add EnableCache() and DisableCache() implementations for IA32 and X64 to the BaseLib
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6705 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
mdkinney
parent
298f0688f7
commit
9f4f2f0e15
@ -157,6 +157,8 @@
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Ia32/ARShiftU64.c | MSFT
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Ia32/Thunk16.asm | MSFT
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Ia32/EnablePaging64.asm | MSFT
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Ia32/EnableCache.c | MSFT
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Ia32/DisableCache.c | MSFT
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SynchronizationMsc.c | MSFT
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Ia32/Wbinvd.asm | INTEL
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@ -253,6 +255,8 @@
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Ia32/ARShiftU64.asm | INTEL
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Ia32/Thunk16.asm | INTEL
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Ia32/EnablePaging64.asm | INTEL
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Ia32/EnableCache.asm | INTEL
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Ia32/DisableCache.asm | INTEL
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Synchronization.c | INTEL
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Ia32/Thunk16.S | GCC
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@ -349,6 +353,8 @@
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Ia32/ARShiftU64.S | GCC
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Ia32/RShiftU64.S | GCC
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Ia32/LShiftU64.S | GCC
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Ia32/EnableCache.S | GCC
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Ia32/DisableCache.S | GCC
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SynchronizationGcc.c | GCC
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Ia32/DivS64x64Remainder.c
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@ -448,6 +454,8 @@
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X64/SwitchStack.asm
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X64/InterlockedCompareExchange64.asm
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X64/InterlockedCompareExchange32.asm
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X64/EnableCache.asm
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X64/DisableCache.asm
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X64/InterlockedDecrement.c | MSFT
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X64/InterlockedIncrement.c | MSFT
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@ -563,6 +571,8 @@
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X64/CpuIdEx.S | GCC
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X64/CpuBreakpoint.S | GCC
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SynchronizationGcc.c | GCC
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X64/EnableCache.S | GCC
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X64/DisableCache.S | GCC
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ChkStkGcc.c | GCC
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[Sources.IPF]
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39
MdePkg/Library/BaseLib/Ia32/DisableCache.S
Normal file
39
MdePkg/Library/BaseLib/Ia32/DisableCache.S
Normal file
@ -0,0 +1,39 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2006 - 2008, Intel Corporation
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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# Module Name:
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#
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# DisableCache.S
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#
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# Abstract:
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#
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# Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
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# WBINVD instruction.
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#
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# Notes:
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#
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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# VOID
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# EFIAPI
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# AsmDisableCache (
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# VOID
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# );
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#------------------------------------------------------------------------------
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.globl ASM_PFX(AsmDisableCache)
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ASM_PFX(AsmDisableCache):
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movl %cr0, %eax
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btsl $30, %eax
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btrl $29, %eax
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movl %eax, %cr0
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wbinvd
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ret
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45
MdePkg/Library/BaseLib/Ia32/DisableCache.asm
Normal file
45
MdePkg/Library/BaseLib/Ia32/DisableCache.asm
Normal file
@ -0,0 +1,45 @@
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;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006, Intel Corporation
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; All rights reserved. This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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; Module Name:
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;
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; DisableCache.Asm
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;
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; Abstract:
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;
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; Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
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; WBINVD instruction.
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;
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; Notes:
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;
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;------------------------------------------------------------------------------
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.386p
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.model flat,C
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.code
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; AsmDisableCache (
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; VOID
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; );
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;------------------------------------------------------------------------------
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AsmDisableCache PROC
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mov eax, cr0
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bts eax, 30
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btr eax, 29
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mov cr0, eax
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wbinvd
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ret
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AsmDisableCache ENDP
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END
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36
MdePkg/Library/BaseLib/Ia32/DisableCache.c
Normal file
36
MdePkg/Library/BaseLib/Ia32/DisableCache.c
Normal file
@ -0,0 +1,36 @@
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/** @file
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AsmDisableCache function
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Copyright (c) 2006 - 2008, Intel Corporation<BR>
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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/**
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Disables caches.
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Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
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WBINVD instruction.
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**/
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VOID
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EFIAPI
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AsmDisableCache (
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VOID
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)
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{
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_asm {
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mov eax, cr0
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bts eax, 30
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btr eax, 29
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mov cr0, eax
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wbinvd
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}
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}
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39
MdePkg/Library/BaseLib/Ia32/EnableCache.S
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39
MdePkg/Library/BaseLib/Ia32/EnableCache.S
Normal file
@ -0,0 +1,39 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2006 - 2008, Intel Corporation
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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# Module Name:
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#
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# EnableCache.S
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#
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# Abstract:
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#
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# Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
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# the NW bit of CR0 to 0
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#
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# Notes:
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#
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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# VOID
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# EFIAPI
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# AsmEnableCache (
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# VOID
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# );
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#------------------------------------------------------------------------------
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.globl ASM_PFX(AsmEnableCache)
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ASM_PFX(AsmEnableCache):
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wbinvd
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movl %cr0, %eax
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btrl $30, %eax
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btrl $29, %eax
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movl %eax, %cr0
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ret
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45
MdePkg/Library/BaseLib/Ia32/EnableCache.asm
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45
MdePkg/Library/BaseLib/Ia32/EnableCache.asm
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@ -0,0 +1,45 @@
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;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006, Intel Corporation
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; All rights reserved. This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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; Module Name:
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;
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; EnableCache.Asm
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;
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; Abstract:
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;
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; Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
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; the NW bit of CR0 to 0
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;
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; Notes:
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;
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;------------------------------------------------------------------------------
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.386p
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.model flat,C
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.code
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; AsmEnableCache (
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; VOID
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; );
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;------------------------------------------------------------------------------
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AsmEnableCache PROC
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wbinvd
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mov eax, cr0
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btr eax, 29
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btr eax, 30
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mov cr0, eax
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ret
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AsmEnableCache ENDP
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END
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36
MdePkg/Library/BaseLib/Ia32/EnableCache.c
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36
MdePkg/Library/BaseLib/Ia32/EnableCache.c
Normal file
@ -0,0 +1,36 @@
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/** @file
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AsmEnableCache function
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Copyright (c) 2006 - 2008, Intel Corporation<BR>
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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/**
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Enabled caches.
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Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
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the NW bit of CR0 to 0
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**/
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VOID
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EFIAPI
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AsmEnableCache (
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VOID
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)
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{
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_asm {
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wbinvd
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mov eax, cr0
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btr eax, 30
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btr eax, 29
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mov cr0, eax
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}
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}
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39
MdePkg/Library/BaseLib/X64/DisableCache.S
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39
MdePkg/Library/BaseLib/X64/DisableCache.S
Normal file
@ -0,0 +1,39 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2006 - 2008, Intel Corporation
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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# Module Name:
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#
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# DisableCache.S
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#
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# Abstract:
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#
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# Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
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# WBINVD instruction.
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#
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# Notes:
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#
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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# VOID
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# EFIAPI
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# AsmDisableCache (
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# VOID
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# );
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#------------------------------------------------------------------------------
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.globl ASM_PFX(AsmDisableCache)
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ASM_PFX(AsmDisableCache):
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movl %cr0, %rax
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btsl $30, %rax
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btrl $29, %rax
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movl %rax, %cr0
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wbinvd
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ret
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43
MdePkg/Library/BaseLib/X64/DisableCache.asm
Normal file
43
MdePkg/Library/BaseLib/X64/DisableCache.asm
Normal file
@ -0,0 +1,43 @@
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;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006, Intel Corporation
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; All rights reserved. This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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; Module Name:
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;
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; DisableCache.Asm
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;
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; Abstract:
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;
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; Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
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; WBINVD instruction.
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;
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; Notes:
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;
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;------------------------------------------------------------------------------
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.code
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; AsmDisableCache (
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; VOID
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; );
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;------------------------------------------------------------------------------
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AsmDisableCache PROC
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mov rax, cr0
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bts rax, 30
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btr rax, 29
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mov cr0, rax
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wbinvd
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ret
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AsmDisableCache ENDP
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END
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39
MdePkg/Library/BaseLib/X64/EnableCache.S
Normal file
39
MdePkg/Library/BaseLib/X64/EnableCache.S
Normal file
@ -0,0 +1,39 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2006 - 2008, Intel Corporation
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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# Module Name:
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#
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# EnableCache.S
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#
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# Abstract:
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#
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# Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
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# the NW bit of CR0 to 0
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#
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# Notes:
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#
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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# VOID
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# EFIAPI
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# AsmEnableCache (
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# VOID
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# );
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#------------------------------------------------------------------------------
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.globl ASM_PFX(AsmEnableCache)
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ASM_PFX(AsmEnableCache):
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wbinvd
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movl %cr0, %rax
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btrl $30, %rax
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btrl $29, %rax
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movl %rax, %cr0
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ret
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43
MdePkg/Library/BaseLib/X64/EnableCache.asm
Normal file
43
MdePkg/Library/BaseLib/X64/EnableCache.asm
Normal file
@ -0,0 +1,43 @@
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;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006, Intel Corporation
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; All rights reserved. This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
|
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; which accompanies this distribution. The full text of the license may be found at
|
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; http://opensource.org/licenses/bsd-license.php
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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; Module Name:
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;
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; EnableCache.Asm
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;
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; Abstract:
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;
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; Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
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; the NW bit of CR0 to 0
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;
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; Notes:
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;
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;------------------------------------------------------------------------------
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.code
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; AsmEnableCache (
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; VOID
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; );
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;------------------------------------------------------------------------------
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AsmEnableCache PROC
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wbinvd
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mov rax, cr0
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btr rax, 29
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btr rax, 30
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mov cr0, rax
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ret
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AsmEnableCache ENDP
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END
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