MdeModulePkg/DxeIpl: Create 5-level page table for long mode

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2008

Correct the logic about whether 5-level paging is supported.

Signed-off-by: Jason Lou <yun.lou@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
Lou, Yun 2022-03-11 23:58:51 +08:00 committed by mergify[bot]
parent 52e09dcd7a
commit a13dfc769b

View File

@ -15,7 +15,7 @@
2) IA-32 Intel(R) Architecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel 2) IA-32 Intel(R) Architecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel
3) IA-32 Intel(R) Architecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel 3) IA-32 Intel(R) Architecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel
Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR> Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR> Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent SPDX-License-Identifier: BSD-2-Clause-Patent
@ -748,8 +748,8 @@ CreateIdentityMappingPageTables (
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS,
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO, CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO,
NULL, NULL,
&EcxFlags.Uint32,
NULL, NULL,
&EcxFlags.Uint32,
NULL NULL
); );
if (EcxFlags.Bits.FiveLevelPage != 0) { if (EcxFlags.Bits.FiveLevelPage != 0) {