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Ring3: Fixed line endings.

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This commit is contained in:
Mikhail Krichanov 2025-01-20 16:30:21 +03:00
parent ca7d3c96c0
commit a37ef161b6
4 changed files with 29 additions and 29 deletions
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16
ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.S
View File

@ -101,7 +101,7 @@ ASM_PFX(Fiq):
ASM_PFX(ResetEntry): ASM_PFX(ResetEntry):
srsdb #0x13! @ Store return state on SVC stack srsdb #0x13! @ Store return state on SVC stack
@ We are already in SVC mode @ We are already in SVC mode
sub SP, SP, #0x8 @ Save space for TTBR0 sub SP, SP, #0x8 @ Save space for TTBR0
stmfd SP!,{LR} @ Store the link register for the current mode stmfd SP!,{LR} @ Store the link register for the current mode
sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
stmfd SP!,{R0-R12} @ Store the register state stmfd SP!,{R0-R12} @ Store the register state
@ -128,7 +128,7 @@ ASM_PFX(SoftwareInterruptEntry):
isb isb
srsdb #0x13! @ Store return state on SVC stack srsdb #0x13! @ Store return state on SVC stack
@ We are already in SVC mode @ We are already in SVC mode
sub SP, SP, #0x8 @ Save space for TTBR0 sub SP, SP, #0x8 @ Save space for TTBR0
stmfd SP!,{LR} @ Store the link register for the current mode stmfd SP!,{LR} @ Store the link register for the current mode
sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
stmfd SP!,{R0-R12} @ Store the register state stmfd SP!,{R0-R12} @ Store the register state
@ -278,9 +278,9 @@ NoAdjustNeeded:
NoTTBR0Switch: NoTTBR0Switch:
#if (FixedPcdGet32(PcdVFPEnabled)) #if (FixedPcdGet32(PcdVFPEnabled))
vpush {d0-d15} @ save vstm registers in case they are used in optimizations vpush {d0-d15} @ save vstm registers in case they are used in optimizations
#endif #endif
mov R4, SP @ Save current SP mov R4, SP @ Save current SP
tst R4, #4 tst R4, #4
@ -301,9 +301,9 @@ CommonCExceptionHandler (
mov SP, R4 @ Restore SP mov SP, R4 @ Restore SP
#if (FixedPcdGet32(PcdVFPEnabled)) #if (FixedPcdGet32(PcdVFPEnabled))
vpop {d0-d15} vpop {d0-d15}
#endif #endif
ldr R4, [SP, #0x40] @ Saved Processor Status Register ldr R4, [SP, #0x40] @ Saved Processor Status Register
and R4, R4, #0xF and R4, R4, #0xF

6
MdeModulePkg/Core/Dxe/SysCall/ARM/CoreBootServices.S
View File

@ -139,9 +139,9 @@ ASM_FUNC(ReturnToCore)
#endif #endif
// Restore old SP_usr and LR_usr. // Restore old SP_usr and LR_usr.
ldmia SP, {SP, LR}^ ldmia SP, {SP, LR}^
add SP, SP, #0x8 add SP, SP, #0x8
pop {R4-R12, LR} pop {R4-R12, LR}
// Enable interrupts. // Enable interrupts.

6
MdeModulePkg/Core/Dxe/SysCall/SupportedProtocols.c
View File

@ -169,7 +169,7 @@ CoreDriverBindingStart (
RemainingDevicePath RemainingDevicePath
); );
gUserPageTable = OldPageTable; gUserPageTable = OldPageTable;
return Status; return Status;
} }
@ -207,7 +207,7 @@ CoreDriverBindingStop (
ChildHandleBuffer ChildHandleBuffer
); );
gUserPageTable = OldPageTable; gUserPageTable = OldPageTable;
return Status; return Status;
} }
@ -243,7 +243,7 @@ CoreFileClose (
FreePool (UserDriver->CoreWrapper); FreePool (UserDriver->CoreWrapper);
RemoveEntryList (&UserDriver->Link); RemoveEntryList (&UserDriver->Link);
gUserPageTable = OldPageTable; gUserPageTable = OldPageTable;
return Status; return Status;
} }

30
UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c
View File

@ -205,18 +205,18 @@ GetExceptionAddresses (
return &mAddresses; return &mAddresses;
} }
VOID VOID
EFIAPI EFIAPI
SetExceptionAddresses ( SetExceptionAddresses (
IN VOID *Buffer, IN VOID *Buffer,
IN UINTN BufferSize IN UINTN BufferSize
) )
{ {
mAddresses.ExceptionStackBase = (UINTN)Buffer; mAddresses.ExceptionStackBase = (UINTN)Buffer;
mAddresses.ExceptionStackSize = BufferSize; mAddresses.ExceptionStackSize = BufferSize;
mAddresses.ExceptionHandlerBase = (UINTN)&ExceptionHandlerBase; mAddresses.ExceptionHandlerBase = (UINTN)&ExceptionHandlerBase;
mAddresses.ExceptionHandlerSize = (UINTN)&ExceptionHandlerEnd - mAddresses.ExceptionHandlerBase; mAddresses.ExceptionHandlerSize = (UINTN)&ExceptionHandlerEnd - mAddresses.ExceptionHandlerBase;
mAddresses.ExceptionDataBase = (UINTN)&CorePageTable; mAddresses.ExceptionDataBase = (UINTN)&CorePageTable;
CorePageTable = AsmReadCr3 (); CorePageTable = AsmReadCr3 ();
} }