mirror of https://github.com/acidanthera/audk.git
1) If PeiLoadImage fails, the section extraction PPI or Decompress PPI may not be ready, we flag that more Peims need to be dispatched.
2) Set the stack to be cacheable before the stack switch occurs so that IPF recovery path will be run from cacheble memory for code, data and stack. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@4288 6f19259b-4bc3-4df7-8a09-765794883524
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@ -372,6 +372,12 @@ Returns:
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);
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);
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PERF_END (0, "PEIM", NULL, 0);
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PERF_END (0, "PEIM", NULL, 0);
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} else {
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//
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// If PeiLoadImage fails, the section extraction PPI or Decompress PPI may not be ready,
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// we flag that more Peims need to be dispatched.
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//
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PeimNeedingDispatch = TRUE;
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}
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}
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//
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//
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@ -44,13 +44,6 @@ Returns:
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{
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{
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EFI_HOB_HANDOFF_INFO_TABLE *Phit;
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EFI_HOB_HANDOFF_INFO_TABLE *Phit;
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if (CoreData == NULL) {
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//
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// the first call with CoreData as NULL.
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//
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return;
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}
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if ((GetHandOffStatus().r10 & 0xFF) == RecoveryFn) {
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if ((GetHandOffStatus().r10 & 0xFF) == RecoveryFn) {
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CoreData->StackBase = CoreData->StackBase & CACHE_MODE_ADDRESS_MASK;
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CoreData->StackBase = CoreData->StackBase & CACHE_MODE_ADDRESS_MASK;
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CoreData->HobList.Raw = (UINT8 *)((UINTN)CoreData->HobList.Raw & CACHE_MODE_ADDRESS_MASK);
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CoreData->HobList.Raw = (UINT8 *)((UINTN)CoreData->HobList.Raw & CACHE_MODE_ADDRESS_MASK);
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@ -115,6 +115,8 @@ Returns:
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UINT64 EfiFreeMemorySize;
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UINT64 EfiFreeMemorySize;
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EFI_PHYSICAL_ADDRESS PhysicalAddressOfOldHob;
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EFI_PHYSICAL_ADDRESS PhysicalAddressOfOldHob;
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DEBUG ((EFI_D_INFO, "PeiInstallPeiMemory MemoryBegin 0x%LX, MemoryLength 0x%LX\n", MemoryBegin, MemoryLength));
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PrivateData = PEI_CORE_INSTANCE_FROM_PS_THIS (PeiServices);
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PrivateData = PEI_CORE_INSTANCE_FROM_PS_THIS (PeiServices);
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PrivateData->SwitchStackSignal = TRUE;
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PrivateData->SwitchStackSignal = TRUE;
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@ -137,8 +139,8 @@ Returns:
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EfiFreeMemorySize = OldHandOffHob->EfiFreeMemoryBottom - PhysicalAddressOfOldHob;
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EfiFreeMemorySize = OldHandOffHob->EfiFreeMemoryBottom - PhysicalAddressOfOldHob;
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DEBUG ((EFI_D_INFO, "HOBLIST address before memory init = 0x%08x\n", OldHandOffHob));
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DEBUG ((EFI_D_INFO, "HOBLIST address before memory init = 0x%p\n", OldHandOffHob));
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DEBUG ((EFI_D_INFO, "HOBLIST address after memory init = 0x%08x\n", NewHandOffHob));
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DEBUG ((EFI_D_INFO, "HOBLIST address after memory init = 0x%p\n", NewHandOffHob));
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CopyMem (
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CopyMem (
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NewHandOffHob,
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NewHandOffHob,
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@ -156,6 +158,12 @@ Returns:
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(OldHandOffHob->EfiEndOfHobList -
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(OldHandOffHob->EfiEndOfHobList -
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PhysicalAddressOfOldHob);
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PhysicalAddressOfOldHob);
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//
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// For IPF in CAR mode the real memory access is uncached,in InstallPeiMemory()
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// the 63-bit of address is set to 1.
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//
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SWITCH_TO_CACHE_MODE (PrivateData);
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ConvertPpiPointers (PeiServices, OldHandOffHob, NewHandOffHob);
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ConvertPpiPointers (PeiServices, OldHandOffHob, NewHandOffHob);
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BuildStackHob (PrivateData->StackBase, PrivateData->StackSize);
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BuildStackHob (PrivateData->StackBase, PrivateData->StackSize);
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Hob.HandoffInformationTable->EfiFreeMemoryTop -= Offset;
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Hob.HandoffInformationTable->EfiFreeMemoryTop -= Offset;
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}
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}
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ASSERT (Hob.HandoffInformationTable->EfiFreeMemoryTop >= Hob.HandoffInformationTable->EfiFreeMemoryBottom);
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//
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//
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// Verify that there is sufficient memory to satisfy the allocation
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// Verify that there is sufficient memory to satisfy the allocation
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//
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//
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}
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}
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}
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}
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//
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// For IPF in CAR mode the real memory access is uncached,in InstallPeiMemory()
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// the 63-bit of address is set to 1.
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//
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SWITCH_TO_CACHE_MODE (OldCoreData);
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if (OldCoreData != NULL) {
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if (OldCoreData != NULL) {
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CopyMem (&PrivateData, OldCoreData, sizeof (PEI_CORE_INSTANCE));
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CopyMem (&PrivateData, OldCoreData, sizeof (PEI_CORE_INSTANCE));
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@ -312,3 +306,4 @@ Returns:
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return EFI_NOT_FOUND;
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return EFI_NOT_FOUND;
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}
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}
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