mirror of https://github.com/acidanthera/audk.git
Vlv2TbltDevicePkg: Always enable QuietBoot to produce BGRT
Cc: Zailiang Sun <zailiang.sun@intel.com> Cc: Yi Qian <yi.qian@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Zailiang Sun <zailiang.sun@intel.com> Reviewed-by: Yi Qian <yi.qian@intel.com>
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@ -1,6 +1,6 @@
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/** @file
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Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2004 - 2019, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@ -1702,6 +1702,8 @@ PlatformBdsPolicyBehavior (
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EsrtManagement = NULL;
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}
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DEBUG ((DEBUG_INFO, "BDS: BootMode=%02x\n", BootMode));
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switch (BootMode) {
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case BOOT_WITH_MINIMAL_CONFIGURATION:
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@ -1778,9 +1780,8 @@ PlatformBdsPolicyBehavior (
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goto FULL_CONFIGURATION;
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}
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if (SystemConfiguration.QuietBoot) {
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EnableQuietBoot (PcdGetPtr(PcdLogoFile));
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} else {
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EnableQuietBoot (PcdGetPtr(PcdLogoFile));
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if (!SystemConfiguration.QuietBoot) {
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PlatformBdsDiagnostics (IGNORE, FALSE, BaseMemoryTest);
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}
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@ -1864,8 +1865,7 @@ PlatformBdsPolicyBehavior (
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// Boot with the specific configuration
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//
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PlatformBdsConnectConsole (gPlatformConsole);
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PlatformBdsDiagnostics (EXTENSIVE, FALSE, BaseMemoryTest);
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EnableQuietBoot (PcdGetPtr(PcdLogoFile));
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PlatformBdsDiagnostics (EXTENSIVE, TRUE, BaseMemoryTest);
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DEBUG((DEBUG_INFO, "ProcessCapsules Before EndOfDxe......\n"));
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ProcessCapsules ();
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@ -1968,10 +1968,9 @@ FULL_CONFIGURATION:
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// Perform some platform specific connect sequence
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//
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PlatformBdsConnectSequence ();
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if (SystemConfiguration.QuietBoot) {
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EnableQuietBoot (PcdGetPtr(PcdLogoFile));
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} else {
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PlatformBdsDiagnostics (IGNORE, FALSE, BaseMemoryTest);
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EnableQuietBoot (PcdGetPtr(PcdLogoFile));
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if (!SystemConfiguration.QuietBoot) {
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PlatformBdsDiagnostics (IGNORE, FALSE, BaseMemoryTest);
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}
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//
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