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Remove debug #ifdef in USB HC init 

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10431 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
andrewfish 2010-04-27 18:59:36 +00:00
parent 01a1c0fc9e
commit a46c3d499e
1 changed files with 6 additions and 56 deletions
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52
Omap35xxPkg/PciEmulation/PciEmulation.c
View File

@ -62,7 +62,6 @@ ConfigureUSBHost (
EFI_STATUS Status;
UINT8 Data = 0;
#if 0
// Take USB host out of force-standby mode
MmioWrite32 (UHH_SYSCONFIG, UHH_SYSCONFIG_MIDLEMODE_NO_STANDBY
| UHH_SYSCONFIG_CLOCKACTIVITY_ON
@ -96,58 +95,9 @@ ConfigureUSBHost (
Status = gTPS65950->Write(gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID3, LEDEN), 1, &Data);
ASSERT_EFI_ERROR(Status);
#else
// Get the Power IC protocol.
Status = gBS->LocateProtocol(&gEmbeddedExternalDeviceProtocolGuid, NULL, (VOID **)&gTPS65950);
ASSERT_EFI_ERROR(Status);
//Enable power to the USB host.
Status = gTPS65950->Read(gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID3, LEDEN), 1, &Data);
ASSERT_EFI_ERROR(Status);
//LEDAON & LEDAPWM control the power to the USB host so enable those bits.
Data |= (LEDAON | LEDAPWM);
Status = gTPS65950->Write(gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID3, LEDEN), 1, &Data);
ASSERT_EFI_ERROR(Status);
// USB reset (GPIO 147 - Port 5 pin 19) output low
MmioAnd32 (GPIO5_BASE + GPIO_OE, ~BIT19);
MmioWrite32 (GPIO5_BASE + GPIO_CLEARDATAOUT, BIT19);
// Turn on functional & interface clocks to the USBHOST power domain
MmioOr32 (CM_FCLKEN_USBHOST, CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE | CM_FCLKEN_USBHOST_EN_USBHOST1_ENABLE);
MmioOr32 (CM_ICLKEN_USBHOST, CM_ICLKEN_USBHOST_EN_USBHOST_ENABLE);
// Wait for clock to become active
while (0 == (MmioRead32 (CM_CLKSTST_USBHOST) & 1));
// Take USB host out of force-standby mode
MmioWrite32 (UHH_SYSCONFIG, UHH_SYSCONFIG_MIDLEMODE_NO_STANDBY
| UHH_SYSCONFIG_CLOCKACTIVITY_ON
| UHH_SYSCONFIG_ENAWAKEUP_ENABLE
| UHH_SYSCONFIG_SOFTRESET
);
while ((MmioRead32 (UHH_SYSSTATUS) & UHH_SYSSTATUS_RESETDONE) != UHH_SYSSTATUS_RESETDONE);
MmioWrite32 (UHH_SYSCONFIG, UHH_SYSCONFIG_CLOCKACTIVITY_ON
| UHH_SYSCONFIG_SIDLEMODE_NO_STANDBY
| UHH_SYSCONFIG_ENAWAKEUP_ENABLE
);
MmioWrite32 (UHH_HOSTCONFIG, UHH_HOSTCONFIG_ENA_INCR16_ENABLE
| UHH_HOSTCONFIG_ENA_INCR8_ENABLE
| UHH_HOSTCONFIG_ENA_INCR4_ENABLE
);
// USB reset output high
MmioWrite32 (GPIO5_BASE + GPIO_SETDATAOUT, BIT19);
#endif
}
EFI_STATUS
PciIoPollMem (
IN EFI_PCI_IO_PROTOCOL *This,