mirror of https://github.com/acidanthera/audk.git
CorebootModulePkg/PciBusNoEnumerationDxe: Remove white space
Remove trailing white space from PciEnumeratorSupport.c. Change-Id: Ia2f354151d46c09b140e2b42609d76fbbf8333f9 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
This commit is contained in:
Leahy, Leroy P
Prince Agyeman
parent
bb0831670f
commit
a4fdb495db
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@ -2,18 +2,18 @@
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Copyright (c) 2005 - 2016, Intel Corporation. All rights reserved.<BR>
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(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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PciEnumeratorSupport.c
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Abstract:
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PCI Bus Driver
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@ -24,17 +24,17 @@ Revision History
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#include "PciBus.h"
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EFI_STATUS
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EFI_STATUS
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InitializePPB (
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IN PCI_IO_DEVICE *PciIoDevice
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IN PCI_IO_DEVICE *PciIoDevice
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);
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EFI_STATUS
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EFI_STATUS
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InitializeP2C (
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IN PCI_IO_DEVICE *PciIoDevice
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IN PCI_IO_DEVICE *PciIoDevice
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);
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PCI_IO_DEVICE*
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PCI_IO_DEVICE*
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CreatePciIoDevice (
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IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,
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IN PCI_TYPE00 *Pci,
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@ -72,12 +72,12 @@ PciSearchDevice (
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);
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EFI_STATUS
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EFI_STATUS
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DetermineDeviceAttribute (
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IN PCI_IO_DEVICE *PciIoDevice
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);
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EFI_STATUS
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EFI_STATUS
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BarExisted (
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IN PCI_IO_DEVICE *PciIoDevice,
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IN UINTN Offset,
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@ -90,10 +90,10 @@ BarExisted (
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EFI_DEVICE_PATH_PROTOCOL*
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CreatePciDevicePath(
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IN EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath,
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IN PCI_IO_DEVICE *PciIoDevice
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IN PCI_IO_DEVICE *PciIoDevice
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);
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PCI_IO_DEVICE*
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PCI_IO_DEVICE*
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GatherDeviceInfo (
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IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,
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IN PCI_TYPE00 *Pci,
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@ -102,7 +102,7 @@ GatherDeviceInfo (
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UINT8 Func
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);
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PCI_IO_DEVICE*
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PCI_IO_DEVICE*
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GatherPPBInfo (
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IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,
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IN PCI_TYPE00 *Pci,
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@ -255,7 +255,7 @@ Returns:
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if (EFI_ERROR (Status)) {
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return Status;
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}
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//
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// If the PCI bridge is initialized then enumerate the next level bus
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//
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@ -368,15 +368,15 @@ Returns:
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if (!PciIoDevice) {
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return EFI_OUT_OF_RESOURCES;
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}
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//
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// Create a device path for this PCI device and store it into its private data
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//
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CreatePciDevicePath(
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Bridge->DevicePath,
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PciIoDevice
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PciIoDevice
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);
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//
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// Detect this function has option rom
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//
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@ -389,8 +389,8 @@ Returns:
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}
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ResetPowerManagementFeature (PciIoDevice);
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}
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}
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else {
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PciRomGetRomResourceFromPciOptionRomTable (
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&gPciBusDriverBinding,
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@ -399,7 +399,7 @@ Returns:
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);
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}
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//
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// Insert it into a global tree for future reference
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//
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@ -509,7 +509,7 @@ Returns:
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if (!PciIoDevice) {
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return NULL;
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}
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if (gFullEnumeration) {
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PciDisableCommandRegister (PciIoDevice, EFI_PCI_COMMAND_BITS_OWNED);
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@ -593,7 +593,7 @@ Returns:
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--*/
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{
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PCI_IO_DEVICE *PciIoDevice;
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PciIoDevice = CreatePciIoDevice (
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PciRootBridgeIo,
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Pci,
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@ -619,7 +619,7 @@ Returns:
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// P2C only has one bar that is in 0x10
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//
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PciParseBar(PciIoDevice, 0x10, 0);
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PciIoDevice->Decodes = EFI_BRIDGE_MEM32_DECODE_SUPPORTED |
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EFI_BRIDGE_PMEM32_DECODE_SUPPORTED |
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EFI_BRIDGE_IO32_DECODE_SUPPORTED;
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@ -742,7 +742,7 @@ DetermineDeviceAttribute (
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/*++
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Routine Description:
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Determine the related attributes of all devices under a Root Bridge
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Arguments:
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@ -799,7 +799,7 @@ Returns:
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PciReadCommandRegister(PciIoDevice, &Command);
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if (Command & EFI_PCI_COMMAND_IO_SPACE) {
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PciIoDevice->Attributes |= EFI_PCI_IO_ATTRIBUTE_IO;
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}
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@ -812,7 +812,7 @@ Returns:
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PciIoDevice->Attributes |= EFI_PCI_IO_ATTRIBUTE_BUS_MASTER;
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}
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if (IS_PCI_BRIDGE (&(PciIoDevice->Pci)) ||
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if (IS_PCI_BRIDGE (&(PciIoDevice->Pci)) ||
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IS_CARDBUS_BRIDGE (&(PciIoDevice->Pci))){
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//
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@ -825,12 +825,12 @@ Returns:
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//
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// Determine whether the ISA bit is set
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// If ISA Enable on Bridge is set, the PPB
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// will block forwarding 0x100-0x3ff for each 1KB in the
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// will block forwarding 0x100-0x3ff for each 1KB in the
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// first 64KB I/O range.
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//
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if ((BridgeControl & EFI_PCI_BRIDGE_CONTROL_ISA) != 0) {
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PciIoDevice->Attributes |= EFI_PCI_IO_ATTRIBUTE_ISA_IO;
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}
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}
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//
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// Determine whether the VGA bit is set
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@ -844,13 +844,13 @@ Returns:
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}
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//
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// if the palette snoop bit is set, then the brige is set to
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// if the palette snoop bit is set, then the brige is set to
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// decode palette IO write
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//
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if (Command & EFI_PCI_COMMAND_VGA_PALETTE_SNOOP) {
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PciIoDevice->Attributes |= EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO;
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}
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}
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}
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return EFI_SUCCESS;
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}
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@ -997,7 +997,7 @@ Returns:
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//
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// Fix the length to support some spefic 64 bit BAR
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//
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Value |= ((UINT32)(-1) << HighBitSet32 (Value));
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Value |= ((UINT32)(-1) << HighBitSet32 (Value));
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//
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// Calculate the size of 64bit bar
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@ -1021,7 +1021,7 @@ Returns:
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break;
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}
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}
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//
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// Check the length again so as to keep compatible with some special bars
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//
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@ -1030,7 +1030,7 @@ Returns:
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PciIoDevice->PciBar[BarIndex].BaseAddress = 0;
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PciIoDevice->PciBar[BarIndex].Alignment = 0;
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}
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//
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// Increment number of bar
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//
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@ -1220,7 +1220,7 @@ PciEnumeratorLight (
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Routine Description:
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This routine is used to enumerate entire pci bus system
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This routine is used to enumerate entire pci bus system
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in a given platform
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Arguments:
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@ -1255,11 +1255,11 @@ Returns:
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// Open the IO Abstraction(s) needed to perform the supported test
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//
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Status = gBS->OpenProtocol (
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Controller ,
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&gEfiDevicePathProtocolGuid,
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Controller ,
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&gEfiDevicePathProtocolGuid,
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(VOID **)&ParentDevicePath,
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gPciBusDriverBinding.DriverBindingHandle,
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Controller,
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gPciBusDriverBinding.DriverBindingHandle,
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Controller,
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EFI_OPEN_PROTOCOL_BY_DRIVER
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);
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if (EFI_ERROR (Status) && Status != EFI_ALREADY_STARTED) {
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@ -1282,7 +1282,7 @@ Returns:
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}
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//
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// Load all EFI Drivers from all PCI Option ROMs behind the PCI Root Bridge
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// Load all EFI Drivers from all PCI Option ROMs behind the PCI Root Bridge
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//
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Status = PciRomLoadEfiDriversFromOptionRomTable (&gPciBusDriverBinding, PciRootBridgeIo);
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@ -1353,9 +1353,9 @@ Arguments:
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MinBus - The min bus.
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MaxBus - The max bus.
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BusRange - The bus range.
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Returns:
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Status Code.
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--*/
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