mirror of https://github.com/acidanthera/audk.git
EmbeddedPkg/DwEmmc: Adjust FIFO threshold
Adjust FIFO threshold according to FIFO depth. Skip the adjustment if we do not have FIFO depth info. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jun Nie <jun.nie@linaro.org> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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@ -38,7 +38,10 @@
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#define DWEMMC_RINTSTS ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x044)
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#define DWEMMC_STATUS ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x048)
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#define DWEMMC_FIFOTH ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x04c)
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#define DWEMMC_TCBCNT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x05c)
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#define DWEMMC_TBBCNT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x060)
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#define DWEMMC_DEBNCE ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x064)
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#define DWEMMC_HCON ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x070)
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#define DWEMMC_UHSREG ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x074)
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#define DWEMMC_BMOD ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x080)
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#define DWEMMC_DBADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x088)
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@ -47,6 +50,7 @@
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#define DWEMMC_DSCADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x094)
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#define DWEMMC_BUFADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x098)
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#define DWEMMC_CARDTHRCTL ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0X100)
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#define DWEMMC_DATA ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0X200)
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#define CMD_UPDATE_CLK 0x80202000
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#define CMD_START_BIT (1 << 31)
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@ -124,4 +128,6 @@
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#define DWEMMC_CARD_RD_THR(x) ((x & 0xfff) << 16)
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#define DWEMMC_CARD_RD_THR_EN (1 << 0)
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#define DWEMMC_GET_HDATA_WIDTH(x) (((x) >> 7) & 0x7)
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#endif // __DWEMMC_H__
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@ -415,6 +415,47 @@ DwEmmcReceiveResponse (
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return EFI_SUCCESS;
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}
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VOID
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DwEmmcAdjustFifoThreshold (
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VOID
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)
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{
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/* DMA multiple transaction size map to reg value as array index */
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CONST UINT32 BurstSize[] = {1, 4, 8, 16, 32, 64, 128, 256};
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UINT32 BlkDepthInFifo, FifoThreshold, FifoWidth, FifoDepth;
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UINT32 BlkSize = DWEMMC_BLOCK_SIZE, Idx = 0, RxWatermark = 1, TxWatermark, TxWatermarkInvers;
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/* Skip FIFO adjustment if we do not have platform FIFO depth info */
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FifoDepth = PcdGet32 (PcdDwEmmcDxeFifoDepth);
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if (!FifoDepth) {
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return;
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}
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TxWatermark = FifoDepth / 2;
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TxWatermarkInvers = FifoDepth - TxWatermark;
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FifoWidth = DWEMMC_GET_HDATA_WIDTH (MmioRead32 (DWEMMC_HCON));
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if (!FifoWidth) {
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FifoWidth = 2;
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} else if (FifoWidth == 2) {
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FifoWidth = 8;
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} else {
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FifoWidth = 4;
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}
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BlkDepthInFifo = BlkSize / FifoWidth;
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Idx = ARRAY_SIZE (BurstSize) - 1;
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while (Idx && ((BlkDepthInFifo % BurstSize[Idx]) || (TxWatermarkInvers % BurstSize[Idx]))) {
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Idx--;
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}
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RxWatermark = BurstSize[Idx] - 1;
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FifoThreshold = DWEMMC_DMA_BURST_SIZE (Idx) | DWEMMC_FIFO_TWMARK (TxWatermark)
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| DWEMMC_FIFO_RWMARK (RxWatermark);
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MmioWrite32 (DWEMMC_FIFOTH, FifoThreshold);
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}
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EFI_STATUS
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PrepareDmaData (
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IN DWEMMC_IDMAC_DESCRIPTOR* IdmacDesc,
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@ -633,6 +674,7 @@ DwEmmcDxeInitialize (
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Handle = NULL;
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DwEmmcAdjustFifoThreshold ();
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gpIdmacDesc = (DWEMMC_IDMAC_DESCRIPTOR *)AllocatePages (DWEMMC_MAX_DESC_PAGES);
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if (gpIdmacDesc == NULL) {
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return EFI_BUFFER_TOO_SMALL;
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@ -49,6 +49,7 @@
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gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeBaseAddress
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gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz
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gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz
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gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeFifoDepth
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[Depex]
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TRUE
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@ -168,6 +168,7 @@
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gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeBaseAddress|0x0|UINT32|0x00000035
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gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz|0x0|UINT32|0x00000036
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gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz|0x0|UINT32|0x00000037
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gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeFifoDepth|0x0|UINT32|0x00000038
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#
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# Android FastBoot
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