mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/CpuExceptionHandlerLib: Code optimization to allow bigger stack
This commit is a code optimization to allow bigger seperate stack size in ArchSetupExceptionStack. In previous code logic, CPU_STACK_ALIGNMENT bytes will be wasted if StackTop is already CPU_STACK_ALIGNMENT aligned. Signed-off-by: Dun Tan <dun.tan@intel.com> Cc: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Reviewed-by: Abner Chang <abner.chang@amd.com>
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@ -215,7 +215,10 @@ ArchSetupExceptionStack (
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// Fixup exception task descriptor and task-state segment
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//
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AsmGetTssTemplateMap (&TemplateMap);
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StackTop = StackTop - CPU_STACK_ALIGNMENT;
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//
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// Plus 1 byte is for compact stack layout in case StackTop is already aligned.
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//
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StackTop = StackTop - CPU_STACK_ALIGNMENT + 1;
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StackTop = (UINTN)ALIGN_POINTER (StackTop, CPU_STACK_ALIGNMENT);
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IdtTable = (IA32_IDT_GATE_DESCRIPTOR *)Idtr.Base;
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for (Index = 0; Index < CPU_STACK_SWITCH_EXCEPTION_NUMBER; ++Index) {
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@ -223,7 +223,10 @@ ArchSetupExceptionStack (
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// Fixup exception task descriptor and task-state segment
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//
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ZeroMem (Tss, sizeof (*Tss));
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StackTop = StackTop - CPU_STACK_ALIGNMENT;
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//
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// Plus 1 byte is for compact stack layout in case StackTop is already aligned.
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//
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StackTop = StackTop - CPU_STACK_ALIGNMENT + 1;
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StackTop = (UINTN)ALIGN_POINTER (StackTop, CPU_STACK_ALIGNMENT);
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IdtTable = (IA32_IDT_GATE_DESCRIPTOR *)Idtr.Base;
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for (Index = 0; Index < CPU_STACK_SWITCH_EXCEPTION_NUMBER; ++Index) {
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