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ArmPlatformPkg/Sec: Added support for Non Cold Boot Paths
For instance, in case of CpuHotPlug boot path the platform has already been initialized. The CPU core should not execute any of the platform initialization in this case. Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13492 6f19259b-4bc3-4df7-8a09-765794883524
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oliviermartin
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@ -15,6 +15,10 @@
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#ifndef _ARMPLATFORMSECLIB_H_
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#define _ARMPLATFORMSECLIB_H_
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#define ARM_SEC_BOOT_MASK ~0
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#define ARM_SEC_COLD_BOOT (1 << 0)
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#define ARM_SEC_SECONDARY_COLD_BOOT (1 << 1)
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/**
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Initialize the memory where the initial stacks will reside
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@ -22,17 +22,18 @@ GCC_ASM_EXPORT(set_non_secure_mode)
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# r0: Monitor World EntryPoint
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# r1: MpId
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# r2: Secure Monitor mode stack
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# r2: SecBootMode
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# r3: Secure Monitor mode stack
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ASM_PFX(enter_monitor_mode):
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cmp r2, #0 @ If a Secure Monitor stack base has not been defined then use the Secure stack
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moveq r2, sp
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cmp r3, #0 @ If a Secure Monitor stack base has not been defined then use the Secure stack
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moveq r3, sp
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mrs r4, cpsr @ Save current mode (SVC) in r4
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bic r3, r4, #0x1f @ Clear all mode bits
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orr r3, r3, #0x16 @ Set bits for Monitor mode
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msr cpsr_cxsf, r3 @ We are now in Monitor Mode
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bic r5, r4, #0x1f @ Clear all mode bits
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orr r5, r5, #0x16 @ Set bits for Monitor mode
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msr cpsr_cxsf, r5 @ We are now in Monitor Mode
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mov sp, r2 @ Set the stack of the Monitor Mode
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mov sp, r3 @ Set the stack of the Monitor Mode
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mov lr, r0 @ Use the pass entrypoint as lr
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@ -40,6 +41,8 @@ ASM_PFX(enter_monitor_mode):
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mov r4, r0 @ Swap EntryPoint and MpId registers
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mov r0, r1
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mov r1, r2
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mov r2, r3
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bx r4
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@ -20,17 +20,18 @@
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// r0: Monitor World EntryPoint
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// r1: MpId
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// r2: Secure Monitor mode stack
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enter_monitor_mode
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cmp r2, #0 // If a Secure Monitor stack base has not been defined then use the Secure stack
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moveq r2, sp
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// r2: SecBootMode
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// r3: Secure Monitor mode stack
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enter_monitor_mode FUNCTION
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cmp r3, #0 // If a Secure Monitor stack base has not been defined then use the Secure stack
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moveq r3, sp
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mrs r4, cpsr // Save current mode (SVC) in r4
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bic r3, r4, #0x1f // Clear all mode bits
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orr r3, r3, #0x16 // Set bits for Monitor mode
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msr cpsr_cxsf, r3 // We are now in Monitor Mode
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bic r5, r4, #0x1f // Clear all mode bits
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orr r5, r5, #0x16 // Set bits for Monitor mode
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msr cpsr_cxsf, r5 // We are now in Monitor Mode
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mov sp, r2 // Set the stack of the Monitor Mode
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mov sp, r3 // Set the stack of the Monitor Mode
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mov lr, r0 // Use the pass entrypoint as lr
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@ -38,8 +39,11 @@ enter_monitor_mode
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mov r4, r0 // Swap EntryPoint and MpId registers
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mov r0, r1
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mov r1, r2
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mov r2, r3
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bx r4
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ENDFUNC
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// We cannot use the instruction 'movs pc, lr' because the caller can be written either in ARM or Thumb2 assembler.
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// When we will jump into this function, we will set the CPSR flag to ARM assembler. By copying directly 'lr' into
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@ -26,7 +26,8 @@
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VOID
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CEntryPoint (
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IN UINTN MpId
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IN UINTN MpId,
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IN UINTN SecBootMode
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)
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{
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CHAR8 Buffer[100];
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@ -109,7 +110,7 @@ CEntryPoint (
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((PcdGet32(PcdCPUCoresSecMonStackBase) != 0) && (PcdGet32(PcdCPUCoreSecMonStackSize) != 0)));
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// Enter Monitor Mode
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enter_monitor_mode ((UINTN)TrustedWorldInitialization, MpId, (VOID*)(PcdGet32(PcdCPUCoresSecMonStackBase) + (PcdGet32(PcdCPUCoreSecMonStackSize) * (GET_CORE_POS(MpId) + 1))));
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enter_monitor_mode ((UINTN)TrustedWorldInitialization, MpId, SecBootMode, (VOID*)(PcdGet32(PcdCPUCoresSecMonStackBase) + (PcdGet32(PcdCPUCoreSecMonStackSize) * (GET_CORE_POS(MpId) + 1))));
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} else {
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if (IS_PRIMARY_CORE(MpId)) {
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SerialPrint ("Trust Zone Configuration is disabled\n\r");
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@ -131,7 +132,8 @@ CEntryPoint (
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VOID
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TrustedWorldInitialization (
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IN UINTN MpId
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IN UINTN MpId,
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IN UINTN SecBootMode
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)
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{
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UINTN JumpAddress;
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@ -153,7 +155,7 @@ TrustedWorldInitialization (
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// Signal the secondary core the Security settings is done (event: EVENT_SECURE_INIT)
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ArmCallSEV ();
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}
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} else {
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} else if ((SecBootMode & ARM_SEC_BOOT_MASK) == ARM_SEC_COLD_BOOT) {
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// The secondary cores need to wait until the Trustzone chipsets configuration is done
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// before switching to Non Secure World
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@ -38,6 +38,9 @@ ASM_PFX(_ModuleEntryPoint):
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// Ensure that the MMU and caches are off
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bl ASM_PFX(ArmDisableCachesAndMmu)
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// By default, we are doing a cold boot
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mov r10, #ARM_SEC_COLD_BOOT
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// Jump to Platform Specific Boot Action function
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blx ASM_PFX(ArmPlatformSecBootAction)
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@ -59,6 +62,11 @@ _IdentifyCpu:
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beq _InitMem
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_WaitInitMem:
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// If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
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// Otherwise we have to wait the Primary Core to finish the initialization
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cmp r10, #ARM_SEC_COLD_BOOT
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bne _SetupSecondaryCoreStack
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// Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)
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bl ASM_PFX(ArmCallWFE)
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// Now the Init Mem is initialized, we setup the secondary core stacks
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@ -108,7 +116,9 @@ _PrepareArguments:
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// Jump to SEC C code
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// r0 = mp_id
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// r1 = Boot Mode
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mov r0, r5
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mov r1, r10
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blx r3
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_NeverReturn:
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@ -33,13 +33,16 @@
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StartupAddr DCD CEntryPoint
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_ModuleEntryPoint
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_ModuleEntryPoint FUNCTION
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// First ensure all interrupts are disabled
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blx ArmDisableInterrupts
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// Ensure that the MMU and caches are off
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blx ArmDisableCachesAndMmu
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// By default, we are doing a cold boot
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mov r10, #ARM_SEC_COLD_BOOT
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// Jump to Platform Specific Boot Action function
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blx ArmPlatformSecBootAction
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@ -61,6 +64,11 @@ _IdentifyCpu
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beq _InitMem
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_WaitInitMem
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// If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
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// Otherwise we have to wait the Primary Core to finish the initialization
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cmp r10, #ARM_SEC_COLD_BOOT
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bne _SetupSecondaryCoreStack
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// Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)
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bl ArmCallWFE
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// Now the Init Mem is initialized, we setup the secondary core stacks
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@ -110,8 +118,11 @@ _PrepareArguments
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// Jump to SEC C code
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// r0 = mp_id
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// r1 = Boot Mode
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mov r0, r5
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mov r1, r10
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blx r3
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ENDFUNC
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_NeverReturn
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b _NeverReturn
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@ -28,7 +28,8 @@
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VOID
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TrustedWorldInitialization (
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IN UINTN MpId
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IN UINTN MpId,
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IN UINTN SecBootMode
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);
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VOID
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@ -53,7 +54,8 @@ VOID
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enter_monitor_mode (
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IN UINTN MonitorEntryPoint,
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IN UINTN MpId,
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IN VOID* Stack
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IN UINTN SecBootMode,
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IN VOID* MonitorStackBase
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);
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VOID
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