mirror of https://github.com/acidanthera/audk.git
QuarkPlatformPkg/PlatformInit: Clear memory based on TCG MOR request
If TCG Memory Overwrite Request is set, then clear all memory available for use by an OS. An OS may optionally use embedded SRAM in Quark SoC X1000, so the embedded SRAM should is cleared too. TCG MOR requests are communicated through a UEFI variable. This module reads UEFI variable to check state of MOR request. Cc: Kelly Steele <kelly.steele@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Kelly Steele <kelly.steele@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19776 6f19259b-4bc3-4df7-8a09-765794883524
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@ -7,7 +7,7 @@ following action is performed in this file,
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4. Set MTRR for PEI
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4. Set MTRR for PEI
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5. Create FV HOB and Flash HOB
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5. Create FV HOB and Flash HOB
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Copyright (c) 2013 Intel Corporation.
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Copyright (c) 2013 - 2016, Intel Corporation.
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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@ -108,6 +108,9 @@ MemoryDiscoveredPpiNotifyCallback (
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UINT8 CpuAddressWidth;
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UINT8 CpuAddressWidth;
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UINT32 RegEax;
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UINT32 RegEax;
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MTRR_SETTINGS MtrrSettings;
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MTRR_SETTINGS MtrrSettings;
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EFI_PEI_READ_ONLY_VARIABLE2_PPI *VariableServices;
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UINT8 MorControl;
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UINTN DataSize;
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DEBUG ((EFI_D_INFO, "Platform PEIM Memory Callback\n"));
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DEBUG ((EFI_D_INFO, "Platform PEIM Memory Callback\n"));
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@ -151,6 +154,52 @@ MemoryDiscoveredPpiNotifyCallback (
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PERF_END (NULL, "SetCache", NULL, 0);
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PERF_END (NULL, "SetCache", NULL, 0);
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//
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// Get necessary PPI
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//
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Status = PeiServicesLocatePpi (
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&gEfiPeiReadOnlyVariable2PpiGuid, // GUID
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0, // INSTANCE
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NULL, // EFI_PEI_PPI_DESCRIPTOR
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(VOID **)&VariableServices // PPI
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);
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ASSERT_EFI_ERROR (Status);
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//
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// Detect MOR request by the OS.
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//
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MorControl = 0;
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DataSize = sizeof (MorControl);
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Status = VariableServices->GetVariable (
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VariableServices,
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MEMORY_OVERWRITE_REQUEST_VARIABLE_NAME,
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&gEfiMemoryOverwriteControlDataGuid,
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NULL,
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&DataSize,
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&MorControl
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);
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//
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// If OS requested a memory overwrite perform it now for Embedded SRAM
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//
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if (MOR_CLEAR_MEMORY_VALUE (MorControl)) {
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DEBUG ((EFI_D_INFO, "Clear Embedded SRAM per MOR request.\n"));
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if (PcdGet32 (PcdESramMemorySize) > 0) {
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if (PcdGet32 (PcdEsramStage1Base) == 0) {
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//
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// ZeroMem() generates an ASSERT() if Buffer parameter is NULL.
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// Clear byte at 0 and start clear operation at address 1.
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//
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*(UINT8 *)(0) = 0;
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ZeroMem ((VOID *)1, (UINTN)PcdGet32 (PcdESramMemorySize) - 1);
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} else {
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ZeroMem (
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(VOID *)(UINTN)PcdGet32 (PcdEsramStage1Base),
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(UINTN)PcdGet32 (PcdESramMemorySize)
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);
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}
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}
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}
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//
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//
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// Install PeiReset for PeiResetSystem service
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// Install PeiReset for PeiResetSystem service
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//
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//
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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Framework PEIM to initialize memory on a Quark Memory Controller.
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Framework PEIM to initialize memory on a Quark Memory Controller.
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Copyright (c) 2013 Intel Corporation.
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Copyright (c) 2013 - 2016, Intel Corporation.
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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@ -563,6 +563,8 @@ InstallEfiMemory (
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PEI_CAPSULE_PPI *Capsule;
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PEI_CAPSULE_PPI *Capsule;
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VOID *LargeMemRangeBuf;
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VOID *LargeMemRangeBuf;
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UINTN LargeMemRangeBufLen;
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UINTN LargeMemRangeBufLen;
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UINT8 MorControl;
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UINTN DataSize;
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//
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//
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// Test the memory from 1M->TOM
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// Test the memory from 1M->TOM
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@ -617,6 +619,20 @@ InstallEfiMemory (
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RequiredMemSize = 0;
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RequiredMemSize = 0;
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RetriveRequiredMemorySize (PeiServices, &RequiredMemSize);
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RetriveRequiredMemorySize (PeiServices, &RequiredMemSize);
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//
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// Detect MOR request by the OS.
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//
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MorControl = 0;
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DataSize = sizeof (MorControl);
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Status = VariableServices->GetVariable (
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VariableServices,
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MEMORY_OVERWRITE_REQUEST_VARIABLE_NAME,
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&gEfiMemoryOverwriteControlDataGuid,
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NULL,
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&DataSize,
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&MorControl
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);
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PeiMemoryIndex = 0;
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PeiMemoryIndex = 0;
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for (Index = 0; Index < NumRanges; Index++)
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for (Index = 0; Index < NumRanges; Index++)
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@ -624,6 +640,29 @@ InstallEfiMemory (
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DEBUG ((EFI_D_INFO, "Found 0x%x bytes at ", MemoryMap[Index].RangeLength));
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DEBUG ((EFI_D_INFO, "Found 0x%x bytes at ", MemoryMap[Index].RangeLength));
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DEBUG ((EFI_D_INFO, "0x%x.\n", MemoryMap[Index].PhysicalAddress));
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DEBUG ((EFI_D_INFO, "0x%x.\n", MemoryMap[Index].PhysicalAddress));
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//
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// If OS requested a memory overwrite perform it now. Only do it for memory
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// used by the OS.
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//
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if (MOR_CLEAR_MEMORY_VALUE (MorControl) && MemoryMap[Index].Type == DualChannelDdrMainMemory) {
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DEBUG ((EFI_D_INFO, "Clear memory per MOR request.\n"));
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if ((UINTN)MemoryMap[Index].RangeLength > 0) {
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if ((UINTN)MemoryMap[Index].PhysicalAddress == 0) {
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//
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// ZeroMem() generates an ASSERT() if Buffer parameter is NULL.
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// Clear byte at 0 and start clear operation at address 1.
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//
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*(UINT8 *)(0) = 0;
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ZeroMem ((VOID *)1, (UINTN)MemoryMap[Index].RangeLength - 1);
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} else {
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ZeroMem (
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(VOID *)(UINTN)MemoryMap[Index].PhysicalAddress,
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(UINTN)MemoryMap[Index].RangeLength
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);
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}
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}
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}
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if ((MemoryMap[Index].Type == DualChannelDdrMainMemory) &&
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if ((MemoryMap[Index].Type == DualChannelDdrMainMemory) &&
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(MemoryMap[Index].PhysicalAddress + MemoryMap[Index].RangeLength < MAX_ADDRESS) &&
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(MemoryMap[Index].PhysicalAddress + MemoryMap[Index].RangeLength < MAX_ADDRESS) &&
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(MemoryMap[Index].PhysicalAddress >= PeiMemoryBaseAddress) &&
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(MemoryMap[Index].PhysicalAddress >= PeiMemoryBaseAddress) &&
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