mirror of
https://github.com/acidanthera/audk.git
synced 2025-07-25 06:34:30 +02:00
1. Changed device detect method to use ATA/ATAPI device signature;
2. Enhancements to better support SATA CDROM; 3. Fixed UDMA operation for buffer above 4G memory issue; 4. Fixed maximal block setting for ATAPI read sector operation to comply with spec; 5. Some minor fixes. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@1739 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
parent
c51cec2560
commit
a98f11c5b9
@ -988,6 +988,10 @@ AtaSoftReset (
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IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
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IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
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//
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// SRST should assert for at least 5 us, we use 10 us for
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// better compatibility
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//
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gBS->Stall (10);
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gBS->Stall (10);
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//
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//
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@ -996,6 +1000,11 @@ AtaSoftReset (
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DeviceControl = 0;
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DeviceControl = 0;
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IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
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IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
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//
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// Wait for at least 2 ms to check BSY status, we use 10 ms
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// for better compatibility
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//
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gBS->Stall(10000);
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//
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//
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// slave device needs at most 31s to clear BSY
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// slave device needs at most 31s to clear BSY
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//
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//
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@ -1114,13 +1123,9 @@ AtaBlkIoReadBlocks (
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} else {
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} else {
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//
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//
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// For ATA-3 compatible device, use ATA-3 read block mechanism
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// For ATA-3 compatible device, use ATA-3 read block mechanism
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// Notice DMA operation can only handle 32bit address
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//
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//
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if ((UINTN) Buffer <= 0xFFFFFFFF) {
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Status = AtaUdmaRead (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
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Status = AtaUdmaRead (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
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if (EFI_ERROR (Status)) {
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}
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if (EFI_ERROR (Status) || ((UINTN) Buffer > 0xFFFFFFFF)) {
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Status = AtaReadSectors (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
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Status = AtaReadSectors (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
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}
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}
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}
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}
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@ -1241,7 +1246,7 @@ AtaBlkIoWriteBlocks (
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// For ATA-3 compatible device, use ATA-3 write block mechanism
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// For ATA-3 compatible device, use ATA-3 write block mechanism
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//
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//
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Status = AtaUdmaWrite (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
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Status = AtaUdmaWrite (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
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if (EFI_ERROR (Status) || ((UINTN) Buffer > 0xFFFFFFFF)) {
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if (EFI_ERROR (Status)) {
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Status = AtaWriteSectors (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
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Status = AtaWriteSectors (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
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}
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}
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}
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}
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@ -2139,21 +2144,26 @@ AtaUdmaReadExt (
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IN UINTN NumberOfBlocks
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IN UINTN NumberOfBlocks
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)
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)
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{
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{
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IDE_DMA_PRD *PrdAddr;
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IDE_DMA_PRD *PrdAddr;
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IDE_DMA_PRD *UsedPrdAddr;
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IDE_DMA_PRD *UsedPrdAddr;
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IDE_DMA_PRD *TempPrdAddr;
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IDE_DMA_PRD *TempPrdAddr;
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UINT8 RegisterValue;
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UINT8 RegisterValue;
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UINT8 Device;
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UINT8 Device;
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UINT64 IoPortForBmic;
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UINT64 IoPortForBmic;
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UINT64 IoPortForBmis;
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UINT64 IoPortForBmis;
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UINT64 IoPortForBmid;
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UINT64 IoPortForBmid;
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EFI_STATUS Status;
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EFI_STATUS Status;
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UINTN PrdTableNum;
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UINTN PrdTableNum;
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UINTN ByteCount;
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UINTN ByteCount;
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UINTN ByteAvailable;
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UINTN ByteAvailable;
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UINT8 *PrdBuffer;
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UINT8 *PrdBuffer;
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UINTN RemainBlockNum;
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UINTN RemainBlockNum;
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UINT8 DeviceControl;
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UINT8 DeviceControl;
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UINT32 Count;
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UINTN PageCount;
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VOID *Map;
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EFI_PHYSICAL_ADDRESS MemPage;
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EFI_PHYSICAL_ADDRESS DeviceAddress;
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//
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//
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// Channel and device differential. Select device.
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// Channel and device differential. Select device.
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@ -2207,7 +2217,20 @@ AtaUdmaReadExt (
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//
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//
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// Build PRD table
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// Build PRD table
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//
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//
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PrdAddr = (IDE_DMA_PRD *) AllocateZeroPool ((2 * PrdTableNum * sizeof (IDE_DMA_PRD)));
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MemPage = 0xFFFFFFFF;
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PageCount = EFI_SIZE_TO_PAGES (2 * PrdTableNum * sizeof (IDE_DMA_PRD));
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Status = gBS->AllocatePages (
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AllocateMaxAddress,
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EfiBootServicesData,
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PageCount,
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&MemPage
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);
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if (EFI_ERROR (Status)) {
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return EFI_OUT_OF_RESOURCES;
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}
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ZeroMem ((VOID *) ((UINTN) MemPage), EFI_PAGES_TO_SIZE (PageCount));
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PrdAddr = (IDE_DMA_PRD *) ((UINTN) MemPage);
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//
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//
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// To make sure PRD is allocated in one 64K page
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// To make sure PRD is allocated in one 64K page
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@ -2225,7 +2248,19 @@ AtaUdmaReadExt (
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//
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//
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// Build the PRD table
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// Build the PRD table
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//
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//
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PrdBuffer = DataBuffer;
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Status = IdeDev->PciIo->Map (
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IdeDev->PciIo,
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EfiPciIoOperationBusMasterWrite,
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DataBuffer,
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&ByteCount,
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&DeviceAddress,
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&Map
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);
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if (EFI_ERROR (Status)) {
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gBS->FreePages (MemPage, PageCount);
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return EFI_OUT_OF_RESOURCES;
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}
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PrdBuffer = (VOID *) ((UINTN) DeviceAddress);
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TempPrdAddr = UsedPrdAddr;
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TempPrdAddr = UsedPrdAddr;
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while (TRUE) {
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while (TRUE) {
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@ -2308,15 +2343,16 @@ AtaUdmaReadExt (
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// Issue READ DMA EXT command
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// Issue READ DMA EXT command
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//
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//
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Status = AtaCommandIssueExt (
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Status = AtaCommandIssueExt (
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IdeDev,
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IdeDev,
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READ_DMA_EXT_CMD,
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READ_DMA_EXT_CMD,
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Device,
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Device,
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0,
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0,
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(UINT16) NumberOfBlocks,
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(UINT16) NumberOfBlocks,
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StartLba
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StartLba
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);
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);
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if (EFI_ERROR (Status)) {
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if (EFI_ERROR (Status)) {
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gBS->FreePool (PrdAddr);
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gBS->FreePages (MemPage, PageCount);
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IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
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return EFI_DEVICE_ERROR;
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return EFI_DEVICE_ERROR;
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}
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}
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@ -2345,7 +2381,11 @@ AtaUdmaReadExt (
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//
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//
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// Check the INTERRUPT and ERROR bit of BMIS
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// Check the INTERRUPT and ERROR bit of BMIS
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// Max transfer number of sectors for one command is 65536(32Mbyte),
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// it will cost 1 second to transfer these data in UDMA mode 2(33.3MBps).
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// So set the variable Count to 2000, for about 2 second timeout time.
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//
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//
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Count = 2000;
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while (TRUE) {
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while (TRUE) {
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IdeDev->PciIo->Io.Read (
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IdeDev->PciIo->Io.Read (
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@ -2356,21 +2396,49 @@ AtaUdmaReadExt (
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1,
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1,
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&RegisterValue
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&RegisterValue
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);
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);
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if (RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) {
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if ((RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) || (Count == 0)) {
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if (RegisterValue & BMIS_ERROR) {
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if ((RegisterValue & BMIS_ERROR) || (Count == 0)) {
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gBS->FreePool (PrdAddr);
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//
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// Clear START bit of BMIC register before return EFI_DEVICE_ERROR
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//
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IdeDev->PciIo->Io.Read (
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IdeDev->PciIo,
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EfiPciIoWidthUint8,
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EFI_PCI_IO_PASS_THROUGH_BAR,
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IoPortForBmic,
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1,
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&RegisterValue
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);
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RegisterValue &= ~((UINT8)BMIC_START);
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IdeDev->PciIo->Io.Write (
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IdeDev->PciIo,
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EfiPciIoWidthUint8,
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EFI_PCI_IO_PASS_THROUGH_BAR,
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IoPortForBmic,
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1,
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&RegisterValue
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);
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gBS->FreePages (MemPage, PageCount);
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IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
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return EFI_DEVICE_ERROR;
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return EFI_DEVICE_ERROR;
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}
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}
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break;
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break;
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}
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}
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gBS->Stall (1000);
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gBS->Stall (1000);
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Count --;
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}
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}
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gBS->FreePool (PrdAddr);
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gBS->FreePages (MemPage, PageCount);
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IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
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//
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//
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// Set START bit of BMIC register
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// Read Status Register of IDE device to clear interrupt
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//
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RegisterValue = IDEReadPortB(IdeDev->PciIo,IdeDev->IoPort->Reg.Status);
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//
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// Clear START bit of BMIC register
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//
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//
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IdeDev->PciIo->Io.Read (
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IdeDev->PciIo->Io.Read (
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IdeDev->PciIo,
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IdeDev->PciIo,
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@ -2400,6 +2468,13 @@ AtaUdmaReadExt (
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StartLba += NumberOfBlocks;
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StartLba += NumberOfBlocks;
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}
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}
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//
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// Disable interrupt of Select device
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//
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IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl);
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DeviceControl |= IEN_L;
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IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
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return EFI_SUCCESS;
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return EFI_SUCCESS;
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}
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}
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@ -2433,21 +2508,26 @@ AtaUdmaRead (
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IN UINTN NumberOfBlocks
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IN UINTN NumberOfBlocks
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)
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)
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{
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{
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IDE_DMA_PRD *PrdAddr;
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IDE_DMA_PRD *PrdAddr;
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IDE_DMA_PRD *UsedPrdAddr;
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IDE_DMA_PRD *UsedPrdAddr;
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IDE_DMA_PRD *TempPrdAddr;
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IDE_DMA_PRD *TempPrdAddr;
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UINT8 RegisterValue;
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UINT8 RegisterValue;
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UINT8 Device;
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UINT8 Device;
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UINT64 IoPortForBmic;
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UINT64 IoPortForBmic;
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UINT64 IoPortForBmis;
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UINT64 IoPortForBmis;
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UINT64 IoPortForBmid;
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UINT64 IoPortForBmid;
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EFI_STATUS Status;
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EFI_STATUS Status;
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UINTN PrdTableNum;
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UINTN PrdTableNum;
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UINTN ByteCount;
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UINTN ByteCount;
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UINTN ByteAvailable;
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UINTN ByteAvailable;
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UINT8 *PrdBuffer;
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UINT8 *PrdBuffer;
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UINTN RemainBlockNum;
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UINTN RemainBlockNum;
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UINT8 DeviceControl;
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UINT8 DeviceControl;
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UINT32 Count;
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UINTN PageCount;
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VOID *Map;
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EFI_PHYSICAL_ADDRESS MemPage;
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EFI_PHYSICAL_ADDRESS DeviceAddress;
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//
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//
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// Channel and device differential
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// Channel and device differential
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@ -2501,7 +2581,20 @@ AtaUdmaRead (
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//
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//
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// Build PRD table
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// Build PRD table
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//
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//
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PrdAddr = (IDE_DMA_PRD *) AllocateZeroPool ((2 * PrdTableNum * sizeof (IDE_DMA_PRD)));
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MemPage = 0xFFFFFFFF;
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PageCount = EFI_SIZE_TO_PAGES (2 * PrdTableNum * sizeof (IDE_DMA_PRD));
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Status = gBS->AllocatePages (
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AllocateMaxAddress,
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EfiBootServicesData,
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PageCount,
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&MemPage
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);
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if (EFI_ERROR (Status)) {
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return EFI_OUT_OF_RESOURCES;
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}
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ZeroMem ((VOID *) ((UINTN) MemPage), EFI_PAGES_TO_SIZE (PageCount));
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|
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PrdAddr = (IDE_DMA_PRD *) ((UINTN) MemPage);
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//
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//
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// To make sure PRD is allocated in one 64K page
|
// To make sure PRD is allocated in one 64K page
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//
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//
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@ -2518,7 +2611,19 @@ AtaUdmaRead (
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//
|
//
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// Build the PRD table
|
// Build the PRD table
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//
|
//
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PrdBuffer = DataBuffer;
|
Status = IdeDev->PciIo->Map (
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|
IdeDev->PciIo,
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EfiPciIoOperationBusMasterWrite,
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DataBuffer,
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|
&ByteCount,
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|
&DeviceAddress,
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|
&Map
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|
);
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|
if (EFI_ERROR (Status)) {
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|
gBS->FreePages (MemPage, PageCount);
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|
return EFI_OUT_OF_RESOURCES;
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|
}
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|
PrdBuffer = (UINT8 *) ((UINTN) DeviceAddress);
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TempPrdAddr = UsedPrdAddr;
|
TempPrdAddr = UsedPrdAddr;
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while (TRUE) {
|
while (TRUE) {
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|
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@ -2601,15 +2706,16 @@ AtaUdmaRead (
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// Issue READ DMA command
|
// Issue READ DMA command
|
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//
|
//
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Status = AtaCommandIssue (
|
Status = AtaCommandIssue (
|
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IdeDev,
|
IdeDev,
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READ_DMA_CMD,
|
READ_DMA_CMD,
|
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Device,
|
Device,
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0,
|
0,
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(UINT16) NumberOfBlocks,
|
(UINT16) NumberOfBlocks,
|
||||||
StartLba
|
StartLba
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);
|
);
|
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if (EFI_ERROR (Status)) {
|
if (EFI_ERROR (Status)) {
|
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gBS->FreePool (PrdAddr);
|
gBS->FreePages (MemPage, PageCount);
|
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|
IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
|
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return EFI_DEVICE_ERROR;
|
return EFI_DEVICE_ERROR;
|
||||||
}
|
}
|
||||||
|
|
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@ -2638,7 +2744,11 @@ AtaUdmaRead (
|
|||||||
|
|
||||||
//
|
//
|
||||||
// Check the INTERRUPT and ERROR bit of BMIS
|
// Check the INTERRUPT and ERROR bit of BMIS
|
||||||
|
// Max transfer number of sectors for one command is 65536(32Mbyte),
|
||||||
|
// it will cost 1 second to transfer these data in UDMA mode 2(33.3MBps).
|
||||||
|
// So set the variable Count to 2000, for about 2 second timeout time.
|
||||||
//
|
//
|
||||||
|
Count = 2000;
|
||||||
while (TRUE) {
|
while (TRUE) {
|
||||||
|
|
||||||
IdeDev->PciIo->Io.Read (
|
IdeDev->PciIo->Io.Read (
|
||||||
@ -2649,21 +2759,49 @@ AtaUdmaRead (
|
|||||||
1,
|
1,
|
||||||
&RegisterValue
|
&RegisterValue
|
||||||
);
|
);
|
||||||
if (RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) {
|
if ((RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) || (Count == 0)) {
|
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if (RegisterValue & BMIS_ERROR) {
|
if ((RegisterValue & BMIS_ERROR) || (Count == 0)) {
|
||||||
gBS->FreePool (PrdAddr);
|
//
|
||||||
|
// Clear START bit of BMIC register before return EFI_DEVICE_ERROR
|
||||||
|
//
|
||||||
|
IdeDev->PciIo->Io.Read (
|
||||||
|
IdeDev->PciIo,
|
||||||
|
EfiPciIoWidthUint8,
|
||||||
|
EFI_PCI_IO_PASS_THROUGH_BAR,
|
||||||
|
IoPortForBmic,
|
||||||
|
1,
|
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|
&RegisterValue
|
||||||
|
);
|
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|
|
||||||
|
RegisterValue &= ~((UINT8)BMIC_START);
|
||||||
|
|
||||||
|
IdeDev->PciIo->Io.Write (
|
||||||
|
IdeDev->PciIo,
|
||||||
|
EfiPciIoWidthUint8,
|
||||||
|
EFI_PCI_IO_PASS_THROUGH_BAR,
|
||||||
|
IoPortForBmic,
|
||||||
|
1,
|
||||||
|
&RegisterValue
|
||||||
|
);
|
||||||
|
gBS->FreePages (MemPage, PageCount);
|
||||||
|
IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
|
||||||
return EFI_DEVICE_ERROR;
|
return EFI_DEVICE_ERROR;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
gBS->Stall (1000);
|
gBS->Stall (1000);
|
||||||
|
Count --;
|
||||||
}
|
}
|
||||||
|
|
||||||
gBS->FreePool (PrdAddr);
|
gBS->FreePages (MemPage, PageCount);
|
||||||
|
IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
|
||||||
//
|
//
|
||||||
// Set START bit of BMIC register
|
// Read Status Register of IDE device to clear interrupt
|
||||||
|
//
|
||||||
|
RegisterValue = IDEReadPortB(IdeDev->PciIo,IdeDev->IoPort->Reg.Status);
|
||||||
|
//
|
||||||
|
// Clear START bit of BMIC register
|
||||||
//
|
//
|
||||||
IdeDev->PciIo->Io.Read (
|
IdeDev->PciIo->Io.Read (
|
||||||
IdeDev->PciIo,
|
IdeDev->PciIo,
|
||||||
@ -2693,6 +2831,13 @@ AtaUdmaRead (
|
|||||||
StartLba += NumberOfBlocks;
|
StartLba += NumberOfBlocks;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Disable interrupt of Select device
|
||||||
|
//
|
||||||
|
IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl);
|
||||||
|
DeviceControl |= IEN_L;
|
||||||
|
IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -2726,21 +2871,26 @@ AtaUdmaWriteExt (
|
|||||||
IN UINTN NumberOfBlocks
|
IN UINTN NumberOfBlocks
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
IDE_DMA_PRD *PrdAddr;
|
IDE_DMA_PRD *PrdAddr;
|
||||||
IDE_DMA_PRD *UsedPrdAddr;
|
IDE_DMA_PRD *UsedPrdAddr;
|
||||||
IDE_DMA_PRD *TempPrdAddr;
|
IDE_DMA_PRD *TempPrdAddr;
|
||||||
UINT8 RegisterValue;
|
UINT8 RegisterValue;
|
||||||
UINT8 Device;
|
UINT8 Device;
|
||||||
UINT64 IoPortForBmic;
|
UINT64 IoPortForBmic;
|
||||||
UINT64 IoPortForBmis;
|
UINT64 IoPortForBmis;
|
||||||
UINT64 IoPortForBmid;
|
UINT64 IoPortForBmid;
|
||||||
EFI_STATUS Status;
|
EFI_STATUS Status;
|
||||||
UINTN PrdTableNum;
|
UINTN PrdTableNum;
|
||||||
UINTN ByteCount;
|
UINTN ByteCount;
|
||||||
UINTN ByteAvailable;
|
UINTN ByteAvailable;
|
||||||
UINT8 *PrdBuffer;
|
UINT8 *PrdBuffer;
|
||||||
UINTN RemainBlockNum;
|
UINTN RemainBlockNum;
|
||||||
UINT8 DeviceControl;
|
UINT8 DeviceControl;
|
||||||
|
UINT32 Count;
|
||||||
|
UINTN PageCount;
|
||||||
|
VOID *Map;
|
||||||
|
EFI_PHYSICAL_ADDRESS MemPage;
|
||||||
|
EFI_PHYSICAL_ADDRESS DeviceAddress;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Channel and device differential
|
// Channel and device differential
|
||||||
@ -2794,7 +2944,20 @@ AtaUdmaWriteExt (
|
|||||||
//
|
//
|
||||||
// Build PRD table
|
// Build PRD table
|
||||||
//
|
//
|
||||||
PrdAddr = (IDE_DMA_PRD *) AllocateZeroPool ((2 * PrdTableNum * sizeof (IDE_DMA_PRD)));
|
MemPage = 0xFFFFFFFF;
|
||||||
|
PageCount = EFI_SIZE_TO_PAGES (2 * PrdTableNum * sizeof (IDE_DMA_PRD));
|
||||||
|
Status = gBS->AllocatePages (
|
||||||
|
AllocateMaxAddress,
|
||||||
|
EfiBootServicesData,
|
||||||
|
PageCount,
|
||||||
|
&MemPage
|
||||||
|
);
|
||||||
|
if (EFI_ERROR (Status)) {
|
||||||
|
return EFI_OUT_OF_RESOURCES;
|
||||||
|
}
|
||||||
|
ZeroMem ((VOID *) ((UINTN) MemPage), EFI_PAGES_TO_SIZE (PageCount));
|
||||||
|
|
||||||
|
PrdAddr = (IDE_DMA_PRD *) ((UINTN) MemPage);
|
||||||
//
|
//
|
||||||
// To make sure PRD is allocated in one 64K page
|
// To make sure PRD is allocated in one 64K page
|
||||||
//
|
//
|
||||||
@ -2811,7 +2974,19 @@ AtaUdmaWriteExt (
|
|||||||
//
|
//
|
||||||
// Build the PRD table
|
// Build the PRD table
|
||||||
//
|
//
|
||||||
PrdBuffer = DataBuffer;
|
Status = IdeDev->PciIo->Map (
|
||||||
|
IdeDev->PciIo,
|
||||||
|
EfiPciIoOperationBusMasterRead,
|
||||||
|
DataBuffer,
|
||||||
|
&ByteCount,
|
||||||
|
&DeviceAddress,
|
||||||
|
&Map
|
||||||
|
);
|
||||||
|
if (EFI_ERROR (Status)) {
|
||||||
|
gBS->FreePages (MemPage, PageCount);
|
||||||
|
return EFI_OUT_OF_RESOURCES;
|
||||||
|
}
|
||||||
|
PrdBuffer = (UINT8 *) ((UINTN) DeviceAddress);
|
||||||
TempPrdAddr = UsedPrdAddr;
|
TempPrdAddr = UsedPrdAddr;
|
||||||
while (TRUE) {
|
while (TRUE) {
|
||||||
|
|
||||||
@ -2896,15 +3071,16 @@ AtaUdmaWriteExt (
|
|||||||
// Issue WRITE DMA EXT command
|
// Issue WRITE DMA EXT command
|
||||||
//
|
//
|
||||||
Status = AtaCommandIssueExt (
|
Status = AtaCommandIssueExt (
|
||||||
IdeDev,
|
IdeDev,
|
||||||
WRITE_DMA_EXT_CMD,
|
WRITE_DMA_EXT_CMD,
|
||||||
Device,
|
Device,
|
||||||
0,
|
0,
|
||||||
(UINT16) NumberOfBlocks,
|
(UINT16) NumberOfBlocks,
|
||||||
StartLba
|
StartLba
|
||||||
);
|
);
|
||||||
if (EFI_ERROR (Status)) {
|
if (EFI_ERROR (Status)) {
|
||||||
gBS->FreePool (PrdAddr);
|
gBS->FreePages (MemPage, PageCount);
|
||||||
|
IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
|
||||||
return EFI_DEVICE_ERROR;
|
return EFI_DEVICE_ERROR;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -2933,7 +3109,11 @@ AtaUdmaWriteExt (
|
|||||||
|
|
||||||
//
|
//
|
||||||
// Check the INTERRUPT and ERROR bit of BMIS
|
// Check the INTERRUPT and ERROR bit of BMIS
|
||||||
|
// Max transfer number of sectors for one command is 65536(32Mbyte),
|
||||||
|
// it will cost 1 second to transfer these data in UDMA mode 2(33.3MBps).
|
||||||
|
// So set the variable Count to 2000, for about 2 second timeout time.
|
||||||
//
|
//
|
||||||
|
Count = 2000;
|
||||||
while (TRUE) {
|
while (TRUE) {
|
||||||
|
|
||||||
IdeDev->PciIo->Io.Read (
|
IdeDev->PciIo->Io.Read (
|
||||||
@ -2944,21 +3124,49 @@ AtaUdmaWriteExt (
|
|||||||
1,
|
1,
|
||||||
&RegisterValue
|
&RegisterValue
|
||||||
);
|
);
|
||||||
if (RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) {
|
if ((RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) || (Count == 0)) {
|
||||||
if (RegisterValue & BMIS_ERROR) {
|
if ((RegisterValue & BMIS_ERROR) || (Count == 0)) {
|
||||||
gBS->FreePool (PrdAddr);
|
//
|
||||||
|
// Clear START bit of BMIC register before return EFI_DEVICE_ERROR
|
||||||
|
//
|
||||||
|
IdeDev->PciIo->Io.Read (
|
||||||
|
IdeDev->PciIo,
|
||||||
|
EfiPciIoWidthUint8,
|
||||||
|
EFI_PCI_IO_PASS_THROUGH_BAR,
|
||||||
|
IoPortForBmic,
|
||||||
|
1,
|
||||||
|
&RegisterValue
|
||||||
|
);
|
||||||
|
|
||||||
|
RegisterValue &= ~((UINT8)BMIC_START);
|
||||||
|
|
||||||
|
IdeDev->PciIo->Io.Write (
|
||||||
|
IdeDev->PciIo,
|
||||||
|
EfiPciIoWidthUint8,
|
||||||
|
EFI_PCI_IO_PASS_THROUGH_BAR,
|
||||||
|
IoPortForBmic,
|
||||||
|
1,
|
||||||
|
&RegisterValue
|
||||||
|
);
|
||||||
|
gBS->FreePages (MemPage, PageCount);
|
||||||
|
IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
|
||||||
return EFI_DEVICE_ERROR;
|
return EFI_DEVICE_ERROR;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
gBS->Stall (1000);
|
gBS->Stall (1000);
|
||||||
|
Count --;
|
||||||
}
|
}
|
||||||
|
|
||||||
gBS->FreePool (PrdAddr);
|
gBS->FreePages (MemPage, PageCount);
|
||||||
|
IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
|
||||||
//
|
//
|
||||||
// Set START bit of BMIC register
|
// Read Status Register of IDE device to clear interrupt
|
||||||
|
//
|
||||||
|
RegisterValue = IDEReadPortB(IdeDev->PciIo,IdeDev->IoPort->Reg.Status);
|
||||||
|
//
|
||||||
|
// Clear START bit of BMIC register
|
||||||
//
|
//
|
||||||
IdeDev->PciIo->Io.Read (
|
IdeDev->PciIo->Io.Read (
|
||||||
IdeDev->PciIo,
|
IdeDev->PciIo,
|
||||||
@ -2984,6 +3192,13 @@ AtaUdmaWriteExt (
|
|||||||
StartLba += NumberOfBlocks;
|
StartLba += NumberOfBlocks;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Disable interrupt of Select device
|
||||||
|
//
|
||||||
|
IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl);
|
||||||
|
DeviceControl |= IEN_L;
|
||||||
|
IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -3021,21 +3236,26 @@ AtaUdmaWrite (
|
|||||||
IN UINTN NumberOfBlocks
|
IN UINTN NumberOfBlocks
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
IDE_DMA_PRD *PrdAddr;
|
IDE_DMA_PRD *PrdAddr;
|
||||||
IDE_DMA_PRD *UsedPrdAddr;
|
IDE_DMA_PRD *UsedPrdAddr;
|
||||||
IDE_DMA_PRD *TempPrdAddr;
|
IDE_DMA_PRD *TempPrdAddr;
|
||||||
UINT8 RegisterValue;
|
UINT8 RegisterValue;
|
||||||
UINT8 Device;
|
UINT8 Device;
|
||||||
UINT64 IoPortForBmic;
|
UINT64 IoPortForBmic;
|
||||||
UINT64 IoPortForBmis;
|
UINT64 IoPortForBmis;
|
||||||
UINT64 IoPortForBmid;
|
UINT64 IoPortForBmid;
|
||||||
EFI_STATUS Status;
|
EFI_STATUS Status;
|
||||||
UINTN PrdTableNum;
|
UINTN PrdTableNum;
|
||||||
UINTN ByteCount;
|
UINTN ByteCount;
|
||||||
UINTN ByteAvailable;
|
UINTN ByteAvailable;
|
||||||
UINT8 *PrdBuffer;
|
UINT8 *PrdBuffer;
|
||||||
UINTN RemainBlockNum;
|
UINTN RemainBlockNum;
|
||||||
UINT8 DeviceControl;
|
UINT8 DeviceControl;
|
||||||
|
UINT32 Count;
|
||||||
|
UINTN PageCount;
|
||||||
|
VOID *Map;
|
||||||
|
EFI_PHYSICAL_ADDRESS MemPage;
|
||||||
|
EFI_PHYSICAL_ADDRESS DeviceAddress;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Channel and device differential
|
// Channel and device differential
|
||||||
@ -3089,7 +3309,20 @@ AtaUdmaWrite (
|
|||||||
//
|
//
|
||||||
// Build PRD table
|
// Build PRD table
|
||||||
//
|
//
|
||||||
PrdAddr = (IDE_DMA_PRD *) AllocateZeroPool ((2 * PrdTableNum * sizeof (IDE_DMA_PRD)));
|
MemPage = 0xFFFFFFFF;
|
||||||
|
PageCount = EFI_SIZE_TO_PAGES (2 * PrdTableNum * sizeof (IDE_DMA_PRD));
|
||||||
|
Status = gBS->AllocatePages (
|
||||||
|
AllocateMaxAddress,
|
||||||
|
EfiBootServicesData,
|
||||||
|
PageCount,
|
||||||
|
&MemPage
|
||||||
|
);
|
||||||
|
if (EFI_ERROR (Status)) {
|
||||||
|
return EFI_OUT_OF_RESOURCES;
|
||||||
|
}
|
||||||
|
ZeroMem ((VOID *) ((UINTN) MemPage), EFI_PAGES_TO_SIZE (PageCount));
|
||||||
|
|
||||||
|
PrdAddr = (IDE_DMA_PRD *) ((UINTN) MemPage);
|
||||||
|
|
||||||
//
|
//
|
||||||
// To make sure PRD is allocated in one 64K page
|
// To make sure PRD is allocated in one 64K page
|
||||||
@ -3107,7 +3340,19 @@ AtaUdmaWrite (
|
|||||||
//
|
//
|
||||||
// Build the PRD table
|
// Build the PRD table
|
||||||
//
|
//
|
||||||
PrdBuffer = DataBuffer;
|
Status = IdeDev->PciIo->Map (
|
||||||
|
IdeDev->PciIo,
|
||||||
|
EfiPciIoOperationBusMasterRead,
|
||||||
|
DataBuffer,
|
||||||
|
&ByteCount,
|
||||||
|
&DeviceAddress,
|
||||||
|
&Map
|
||||||
|
);
|
||||||
|
if (EFI_ERROR (Status)) {
|
||||||
|
gBS->FreePages (MemPage, PageCount);
|
||||||
|
return EFI_OUT_OF_RESOURCES;
|
||||||
|
}
|
||||||
|
PrdBuffer = (UINT8 *) ((UINTN) DeviceAddress);
|
||||||
TempPrdAddr = UsedPrdAddr;
|
TempPrdAddr = UsedPrdAddr;
|
||||||
while (TRUE) {
|
while (TRUE) {
|
||||||
|
|
||||||
@ -3192,15 +3437,16 @@ AtaUdmaWrite (
|
|||||||
// Issue WRITE DMA command
|
// Issue WRITE DMA command
|
||||||
//
|
//
|
||||||
Status = AtaCommandIssue (
|
Status = AtaCommandIssue (
|
||||||
IdeDev,
|
IdeDev,
|
||||||
WRITE_DMA_CMD,
|
WRITE_DMA_CMD,
|
||||||
Device,
|
Device,
|
||||||
0,
|
0,
|
||||||
(UINT16) NumberOfBlocks,
|
(UINT16) NumberOfBlocks,
|
||||||
StartLba
|
StartLba
|
||||||
);
|
);
|
||||||
if (EFI_ERROR (Status)) {
|
if (EFI_ERROR (Status)) {
|
||||||
gBS->FreePool (PrdAddr);
|
gBS->FreePages (MemPage, PageCount);
|
||||||
|
IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
|
||||||
return EFI_DEVICE_ERROR;
|
return EFI_DEVICE_ERROR;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -3229,7 +3475,11 @@ AtaUdmaWrite (
|
|||||||
|
|
||||||
//
|
//
|
||||||
// Check the INTERRUPT and ERROR bit of BMIS
|
// Check the INTERRUPT and ERROR bit of BMIS
|
||||||
|
// Max transfer number of sectors for one command is 65536(32Mbyte),
|
||||||
|
// it will cost 1 second to transfer these data in UDMA mode 2(33.3MBps).
|
||||||
|
// So set the variable Count to 2000, for about 2 second timeout time.
|
||||||
//
|
//
|
||||||
|
Count = 2000;
|
||||||
while (TRUE) {
|
while (TRUE) {
|
||||||
|
|
||||||
IdeDev->PciIo->Io.Read (
|
IdeDev->PciIo->Io.Read (
|
||||||
@ -3240,21 +3490,50 @@ AtaUdmaWrite (
|
|||||||
1,
|
1,
|
||||||
&RegisterValue
|
&RegisterValue
|
||||||
);
|
);
|
||||||
if (RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) {
|
if ((RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) || (Count == 0)) {
|
||||||
if (RegisterValue & BMIS_ERROR) {
|
if ((RegisterValue & BMIS_ERROR) || (Count == 0)) {
|
||||||
gBS->FreePool (PrdAddr);
|
//
|
||||||
|
// Clear START bit of BMIC register before return EFI_DEVICE_ERROR
|
||||||
|
//
|
||||||
|
IdeDev->PciIo->Io.Read (
|
||||||
|
IdeDev->PciIo,
|
||||||
|
EfiPciIoWidthUint8,
|
||||||
|
EFI_PCI_IO_PASS_THROUGH_BAR,
|
||||||
|
IoPortForBmic,
|
||||||
|
1,
|
||||||
|
&RegisterValue
|
||||||
|
);
|
||||||
|
|
||||||
|
RegisterValue &= ~((UINT8)BMIC_START);
|
||||||
|
|
||||||
|
IdeDev->PciIo->Io.Write (
|
||||||
|
IdeDev->PciIo,
|
||||||
|
EfiPciIoWidthUint8,
|
||||||
|
EFI_PCI_IO_PASS_THROUGH_BAR,
|
||||||
|
IoPortForBmic,
|
||||||
|
1,
|
||||||
|
&RegisterValue
|
||||||
|
);
|
||||||
|
gBS->FreePages (MemPage, PageCount);
|
||||||
|
IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
|
||||||
return EFI_DEVICE_ERROR;
|
return EFI_DEVICE_ERROR;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
gBS->Stall (1000);
|
gBS->Stall (1000);
|
||||||
|
Count --;
|
||||||
}
|
}
|
||||||
|
|
||||||
gBS->FreePool (PrdAddr);
|
gBS->FreePages (MemPage, PageCount);
|
||||||
|
IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
|
||||||
|
|
||||||
//
|
//
|
||||||
// Set START bit of BMIC register
|
// Read Status Register of IDE device to clear interrupt
|
||||||
|
//
|
||||||
|
RegisterValue = IDEReadPortB(IdeDev->PciIo,IdeDev->IoPort->Reg.Status);
|
||||||
|
//
|
||||||
|
// Clear START bit of BMIC register
|
||||||
//
|
//
|
||||||
IdeDev->PciIo->Io.Read (
|
IdeDev->PciIo->Io.Read (
|
||||||
IdeDev->PciIo,
|
IdeDev->PciIo,
|
||||||
@ -3280,5 +3559,12 @@ AtaUdmaWrite (
|
|||||||
StartLba += NumberOfBlocks;
|
StartLba += NumberOfBlocks;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Disable interrupt of Select device
|
||||||
|
//
|
||||||
|
IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl);
|
||||||
|
DeviceControl |= IEN_L;
|
||||||
|
IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
File diff suppressed because it is too large
Load Diff
@ -12,8 +12,11 @@
|
|||||||
|
|
||||||
#include "idebus.h"
|
#include "idebus.h"
|
||||||
|
|
||||||
BOOLEAN SlaveDeviceExist = FALSE;
|
BOOLEAN ChannelDeviceDetected = FALSE;
|
||||||
BOOLEAN MasterDeviceExist = FALSE;
|
BOOLEAN SlaveDeviceExist = FALSE;
|
||||||
|
UINT8 SlaveDeviceType = INVALID_DEVICE_TYPE;
|
||||||
|
BOOLEAN MasterDeviceExist = FALSE;
|
||||||
|
UINT8 MasterDeviceType = INVALID_DEVICE_TYPE;
|
||||||
|
|
||||||
/**
|
/**
|
||||||
TODO: Add function description
|
TODO: Add function description
|
||||||
@ -464,57 +467,6 @@ ReassignIdeResources (
|
|||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
|
||||||
Read SATA registers to detect SATA disks
|
|
||||||
|
|
||||||
@param IdeDev The BLK_IO private data which specifies the IDE device
|
|
||||||
|
|
||||||
**/
|
|
||||||
EFI_STATUS
|
|
||||||
CheckPowerMode (
|
|
||||||
IDE_BLK_IO_DEV *IdeDev
|
|
||||||
)
|
|
||||||
// TODO: EFI_NOT_FOUND - add return value to function comment
|
|
||||||
// TODO: EFI_SUCCESS - add return value to function comment
|
|
||||||
// TODO: EFI_NOT_FOUND - add return value to function comment
|
|
||||||
{
|
|
||||||
UINT8 ErrorRegister;
|
|
||||||
EFI_STATUS Status;
|
|
||||||
|
|
||||||
IDEWritePortB (
|
|
||||||
IdeDev->PciIo,
|
|
||||||
IdeDev->IoPort->Head,
|
|
||||||
(UINT8) ((IdeDev->Device << 4) | 0xe0)
|
|
||||||
);
|
|
||||||
|
|
||||||
//
|
|
||||||
// Wait 31 seconds for BSY clear. BSY should be in clear state if there exists
|
|
||||||
// a device (initial state). Normally, BSY is also in clear state if there is
|
|
||||||
// no device
|
|
||||||
//
|
|
||||||
Status = WaitForBSYClear (IdeDev, 31000);
|
|
||||||
if (EFI_ERROR (Status)) {
|
|
||||||
return EFI_NOT_FOUND;
|
|
||||||
}
|
|
||||||
|
|
||||||
//
|
|
||||||
// select device, read error register
|
|
||||||
//
|
|
||||||
IDEWritePortB (
|
|
||||||
IdeDev->PciIo,
|
|
||||||
IdeDev->IoPort->Head,
|
|
||||||
(UINT8) ((IdeDev->Device << 4) | 0xe0)
|
|
||||||
);
|
|
||||||
Status = DRDYReady (IdeDev, 200);
|
|
||||||
|
|
||||||
ErrorRegister = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Error);
|
|
||||||
if ((ErrorRegister == 0x01) || (ErrorRegister == 0x81)) {
|
|
||||||
return EFI_SUCCESS;
|
|
||||||
} else {
|
|
||||||
return EFI_NOT_FOUND;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
//
|
//
|
||||||
// DiscoverIdeDevice
|
// DiscoverIdeDevice
|
||||||
//
|
//
|
||||||
@ -533,44 +485,67 @@ DiscoverIdeDevice (
|
|||||||
// TODO: EFI_SUCCESS - add return value to function comment
|
// TODO: EFI_SUCCESS - add return value to function comment
|
||||||
{
|
{
|
||||||
EFI_STATUS Status;
|
EFI_STATUS Status;
|
||||||
BOOLEAN SataFlag;
|
|
||||||
|
|
||||||
SataFlag = FALSE;
|
|
||||||
//
|
|
||||||
// This extra detection is for SATA disks
|
|
||||||
//
|
|
||||||
Status = CheckPowerMode (IdeDev);
|
|
||||||
if (Status == EFI_SUCCESS) {
|
|
||||||
SataFlag = TRUE;
|
|
||||||
}
|
|
||||||
|
|
||||||
//
|
//
|
||||||
// If a channel has not been checked, check it now. Then set it to "checked" state
|
// If a channel has not been checked, check it now. Then set it to "checked" state
|
||||||
// After this step, all devices in this channel have been checked.
|
// After this step, all devices in this channel have been checked.
|
||||||
//
|
//
|
||||||
Status = DetectIDEController (IdeDev);
|
if (ChannelDeviceDetected == FALSE) {
|
||||||
|
Status = DetectIDEController (IdeDev);
|
||||||
if ((EFI_ERROR (Status)) && !SataFlag) {
|
|
||||||
return EFI_NOT_FOUND;
|
|
||||||
}
|
|
||||||
|
|
||||||
//
|
|
||||||
// Device exists. test if it is an ATA device
|
|
||||||
//
|
|
||||||
Status = ATAIdentify (IdeDev);
|
|
||||||
if (EFI_ERROR (Status)) {
|
|
||||||
//
|
|
||||||
// if not ATA device, test if it is an ATAPI device
|
|
||||||
//
|
|
||||||
Status = ATAPIIdentify (IdeDev);
|
|
||||||
if (EFI_ERROR (Status)) {
|
if (EFI_ERROR (Status)) {
|
||||||
//
|
|
||||||
// if not ATAPI device either, return error.
|
|
||||||
//
|
|
||||||
return EFI_NOT_FOUND;
|
return EFI_NOT_FOUND;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
Status = EFI_NOT_FOUND;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Device exists. test if it is an ATA device.
|
||||||
|
// Prefer the result from DetectIDEController,
|
||||||
|
// if failed, try another device type to handle
|
||||||
|
// devices that not follow the spec.
|
||||||
|
//
|
||||||
|
if ((IdeDev->Device == IdeMaster) && (MasterDeviceExist)) {
|
||||||
|
if (MasterDeviceType == ATA_DEVICE_TYPE) {
|
||||||
|
Status = ATAIdentify (IdeDev);
|
||||||
|
if (EFI_ERROR (Status)) {
|
||||||
|
Status = ATAPIIdentify (IdeDev);
|
||||||
|
if (!EFI_ERROR (Status)) {
|
||||||
|
MasterDeviceType = ATAPI_DEVICE_TYPE;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
Status = ATAPIIdentify (IdeDev);
|
||||||
|
if (EFI_ERROR (Status)) {
|
||||||
|
Status = ATAIdentify (IdeDev);
|
||||||
|
if (!EFI_ERROR (Status)) {
|
||||||
|
MasterDeviceType = ATA_DEVICE_TYPE;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
if ((IdeDev->Device == IdeSlave) && (SlaveDeviceExist)) {
|
||||||
|
if (SlaveDeviceType == ATA_DEVICE_TYPE) {
|
||||||
|
Status = ATAIdentify (IdeDev);
|
||||||
|
if (EFI_ERROR (Status)) {
|
||||||
|
Status = ATAPIIdentify (IdeDev);
|
||||||
|
if (!EFI_ERROR (Status)) {
|
||||||
|
SlaveDeviceType = ATAPI_DEVICE_TYPE;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
Status = ATAPIIdentify (IdeDev);
|
||||||
|
if (EFI_ERROR (Status)) {
|
||||||
|
Status = ATAIdentify (IdeDev);
|
||||||
|
if (!EFI_ERROR (Status)) {
|
||||||
|
SlaveDeviceType = ATA_DEVICE_TYPE;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
if (EFI_ERROR (Status)) {
|
||||||
|
return EFI_NOT_FOUND;
|
||||||
|
}
|
||||||
//
|
//
|
||||||
// Init Block I/O interface
|
// Init Block I/O interface
|
||||||
//
|
//
|
||||||
@ -595,6 +570,26 @@ DiscoverIdeDevice (
|
|||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
This interface is used to initialize all state data related to the detection of one
|
||||||
|
channel.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS Completed Successfully.
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
InitializeIDEChannelData (
|
||||||
|
VOID
|
||||||
|
)
|
||||||
|
{
|
||||||
|
ChannelDeviceDetected = FALSE;
|
||||||
|
MasterDeviceExist = FALSE;
|
||||||
|
MasterDeviceType = 0xff;
|
||||||
|
SlaveDeviceExist = FALSE;
|
||||||
|
SlaveDeviceType = 0xff;
|
||||||
|
return EFI_SUCCESS;
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
This function is called by DiscoverIdeDevice(). It is used for detect
|
This function is called by DiscoverIdeDevice(). It is used for detect
|
||||||
whether the IDE device exists in the specified Channel as the specified
|
whether the IDE device exists in the specified Channel as the specified
|
||||||
@ -633,31 +628,12 @@ DetectIDEController (
|
|||||||
)
|
)
|
||||||
{
|
{
|
||||||
EFI_STATUS Status;
|
EFI_STATUS Status;
|
||||||
UINT8 ErrorReg;
|
UINT8 SectorCountReg;
|
||||||
UINT8 StatusReg;
|
UINT8 LBALowReg;
|
||||||
|
UINT8 LBAMidReg;
|
||||||
|
UINT8 LBAHighReg;
|
||||||
UINT8 InitStatusReg;
|
UINT8 InitStatusReg;
|
||||||
EFI_STATUS DeviceStatus;
|
UINT8 StatusReg;
|
||||||
|
|
||||||
//
|
|
||||||
// Slave device has been detected with master device.
|
|
||||||
//
|
|
||||||
if ((IdeDev->Device) == 1) {
|
|
||||||
if (SlaveDeviceExist) {
|
|
||||||
//
|
|
||||||
// If master not exists but slave exists, slave have to wait a while
|
|
||||||
//
|
|
||||||
if (!MasterDeviceExist) {
|
|
||||||
//
|
|
||||||
// if single slave can't be detected, add delay 4s here.
|
|
||||||
//
|
|
||||||
gBS->Stall (4000000);
|
|
||||||
}
|
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
|
||||||
} else {
|
|
||||||
return EFI_NOT_FOUND;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
//
|
//
|
||||||
// Select slave device
|
// Select slave device
|
||||||
@ -675,7 +651,7 @@ DetectIDEController (
|
|||||||
InitStatusReg = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Status);
|
InitStatusReg = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Status);
|
||||||
|
|
||||||
//
|
//
|
||||||
// Select master back
|
// Select Master back
|
||||||
//
|
//
|
||||||
IDEWritePortB (
|
IDEWritePortB (
|
||||||
IdeDev->PciIo,
|
IdeDev->PciIo,
|
||||||
@ -683,6 +659,7 @@ DetectIDEController (
|
|||||||
(UINT8) ((0 << 4) | 0xe0)
|
(UINT8) ((0 << 4) | 0xe0)
|
||||||
);
|
);
|
||||||
gBS->Stall (100);
|
gBS->Stall (100);
|
||||||
|
|
||||||
//
|
//
|
||||||
// Send ATA Device Execut Diagnostic command.
|
// Send ATA Device Execut Diagnostic command.
|
||||||
// This command should work no matter DRDY is ready or not
|
// This command should work no matter DRDY is ready or not
|
||||||
@ -690,88 +667,124 @@ DetectIDEController (
|
|||||||
IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, 0x90);
|
IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, 0x90);
|
||||||
|
|
||||||
Status = WaitForBSYClear (IdeDev, 3500);
|
Status = WaitForBSYClear (IdeDev, 3500);
|
||||||
|
if (EFI_ERROR (Status)) {
|
||||||
ErrorReg = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Error);
|
DEBUG((EFI_D_ERROR, "New detecting method: Send Execute Diagnostic Command: WaitForBSYClear: Status: %d\n", Status));
|
||||||
|
return Status;
|
||||||
|
}
|
||||||
//
|
//
|
||||||
// Master Error register is 0x01. D0 passed, D1 passed or not present.
|
// Read device signature
|
||||||
// Master Error register is 0x81. D0 passed, D1 failed. Return.
|
|
||||||
// Master Error register is other value. D0 failed, D1 passed or not present..
|
|
||||||
//
|
//
|
||||||
if (ErrorReg == 0x01) {
|
//
|
||||||
|
// Select Master
|
||||||
|
//
|
||||||
|
IDEWritePortB (
|
||||||
|
IdeDev->PciIo,
|
||||||
|
IdeDev->IoPort->Head,
|
||||||
|
(UINT8) ((0 << 4) | 0xe0)
|
||||||
|
);
|
||||||
|
gBS->Stall (100);
|
||||||
|
SectorCountReg = IDEReadPortB (
|
||||||
|
IdeDev->PciIo,
|
||||||
|
IdeDev->IoPort->SectorCount
|
||||||
|
);
|
||||||
|
LBALowReg = IDEReadPortB (
|
||||||
|
IdeDev->PciIo,
|
||||||
|
IdeDev->IoPort->SectorNumber
|
||||||
|
);
|
||||||
|
LBAMidReg = IDEReadPortB (
|
||||||
|
IdeDev->PciIo,
|
||||||
|
IdeDev->IoPort->CylinderLsb
|
||||||
|
);
|
||||||
|
LBAHighReg = IDEReadPortB (
|
||||||
|
IdeDev->PciIo,
|
||||||
|
IdeDev->IoPort->CylinderMsb
|
||||||
|
);
|
||||||
|
if ((SectorCountReg == 0x1) &&
|
||||||
|
(LBALowReg == 0x1) &&
|
||||||
|
(LBAMidReg == 0x0) &&
|
||||||
|
(LBAHighReg == 0x0)) {
|
||||||
MasterDeviceExist = TRUE;
|
MasterDeviceExist = TRUE;
|
||||||
DeviceStatus = EFI_SUCCESS;
|
MasterDeviceType = ATA_DEVICE_TYPE;
|
||||||
} else if (ErrorReg == 0x81) {
|
|
||||||
|
|
||||||
MasterDeviceExist = TRUE;
|
|
||||||
DeviceStatus = EFI_SUCCESS;
|
|
||||||
SlaveDeviceExist = FALSE;
|
|
||||||
|
|
||||||
return DeviceStatus;
|
|
||||||
} else {
|
} else {
|
||||||
MasterDeviceExist = FALSE;
|
if ((LBAMidReg == 0x14) &&
|
||||||
DeviceStatus = EFI_NOT_FOUND;
|
(LBAHighReg == 0xeb)) {
|
||||||
|
MasterDeviceExist = TRUE;
|
||||||
|
MasterDeviceType = ATAPI_DEVICE_TYPE;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
//
|
//
|
||||||
// Master Error register is not 0x81, Go on check Slave
|
// For some Hard Drive, it takes some time to get
|
||||||
//
|
// the right signature when operating in single slave mode.
|
||||||
|
// We stall 20ms to work around this.
|
||||||
//
|
|
||||||
// Stall 20ms to wait for slave device ready if master device not exists
|
|
||||||
//
|
//
|
||||||
if (!MasterDeviceExist) {
|
if (!MasterDeviceExist) {
|
||||||
gBS->Stall (20000);
|
gBS->Stall (20000);
|
||||||
}
|
}
|
||||||
|
|
||||||
//
|
//
|
||||||
// select slave
|
// Select Slave
|
||||||
//
|
//
|
||||||
IDEWritePortB (
|
IDEWritePortB (
|
||||||
IdeDev->PciIo,
|
IdeDev->PciIo,
|
||||||
IdeDev->IoPort->Head,
|
IdeDev->IoPort->Head,
|
||||||
(UINT8) ((1 << 4) | 0xe0)
|
(UINT8) ((1 << 4) | 0xe0)
|
||||||
);
|
);
|
||||||
|
gBS->Stall (100);
|
||||||
gBS->Stall (300);
|
SectorCountReg = IDEReadPortB (
|
||||||
ErrorReg = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Error);
|
IdeDev->PciIo,
|
||||||
|
IdeDev->IoPort->SectorCount
|
||||||
//
|
);
|
||||||
// Slave Error register is not 0x01, D1 failed. Return.
|
LBALowReg = IDEReadPortB (
|
||||||
//
|
IdeDev->PciIo,
|
||||||
if (ErrorReg != 0x01) {
|
IdeDev->IoPort->SectorNumber
|
||||||
SlaveDeviceExist = FALSE;
|
);
|
||||||
return DeviceStatus;
|
LBAMidReg = IDEReadPortB (
|
||||||
}
|
IdeDev->PciIo,
|
||||||
|
IdeDev->IoPort->CylinderLsb
|
||||||
StatusReg = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Status);
|
);
|
||||||
|
LBAHighReg = IDEReadPortB (
|
||||||
//
|
IdeDev->PciIo,
|
||||||
// Most ATAPI devices don't set DRDY bit, so test with a slow but accurate
|
IdeDev->IoPort->CylinderMsb
|
||||||
// "ATAPI TEST UNIT READY" command
|
);
|
||||||
//
|
StatusReg = IDEReadPortB (
|
||||||
if (((StatusReg & DRDY) == 0) && ((InitStatusReg & DRDY) == 0)) {
|
IdeDev->PciIo,
|
||||||
Status = AtapiTestUnitReady (IdeDev);
|
IdeDev->IoPort->Reg.Status
|
||||||
|
);
|
||||||
//
|
if ((SectorCountReg == 0x1) &&
|
||||||
// Still fail, Slave doesn't exist.
|
(LBALowReg == 0x1) &&
|
||||||
//
|
(LBAMidReg == 0x0) &&
|
||||||
if (EFI_ERROR (Status)) {
|
(LBAHighReg == 0x0)) {
|
||||||
SlaveDeviceExist = FALSE;
|
SlaveDeviceExist = TRUE;
|
||||||
return DeviceStatus;
|
SlaveDeviceType = ATA_DEVICE_TYPE;
|
||||||
|
} else {
|
||||||
|
if ((LBAMidReg == 0x14) &&
|
||||||
|
(LBAHighReg == 0xeb)) {
|
||||||
|
SlaveDeviceExist = TRUE;
|
||||||
|
SlaveDeviceType = ATAPI_DEVICE_TYPE;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
//
|
//
|
||||||
// Error reg is 0x01 and DRDY is ready,
|
// When single master is plugged, slave device
|
||||||
// or ATAPI test unit ready success,
|
// will be wrongly detected. Here's the workaround
|
||||||
// or init Slave status DRDY is ready
|
// for ATA devices by detecting DRY bit in status
|
||||||
// Slave exists.
|
// register.
|
||||||
|
// NOTE: This workaround doesn't apply to ATAPI.
|
||||||
//
|
//
|
||||||
SlaveDeviceExist = TRUE;
|
if (MasterDeviceExist && SlaveDeviceExist &&
|
||||||
|
(StatusReg & DRDY) == 0 &&
|
||||||
return DeviceStatus;
|
(InitStatusReg & DRDY) == 0 &&
|
||||||
|
MasterDeviceType == SlaveDeviceType &&
|
||||||
|
SlaveDeviceType != ATAPI_DEVICE_TYPE) {
|
||||||
|
SlaveDeviceExist = FALSE;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Indicate this channel has been detected
|
||||||
|
//
|
||||||
|
ChannelDeviceDetected = TRUE;
|
||||||
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -1251,7 +1264,7 @@ DRDYReady (
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
gBS->Stall (15);
|
gBS->Stall (30);
|
||||||
|
|
||||||
Delay--;
|
Delay--;
|
||||||
} while (Delay);
|
} while (Delay);
|
||||||
@ -1432,6 +1445,11 @@ ReleaseIdeResources (
|
|||||||
gBS->FreePool (IdeBlkIoDevice->DevicePath);
|
gBS->FreePool (IdeBlkIoDevice->DevicePath);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (IdeBlkIoDevice->ExitBootServiceEvent != NULL) {
|
||||||
|
gBS->CloseEvent (IdeBlkIoDevice->ExitBootServiceEvent);
|
||||||
|
IdeBlkIoDevice->ExitBootServiceEvent = NULL;
|
||||||
|
}
|
||||||
|
|
||||||
gBS->FreePool (IdeBlkIoDevice);
|
gBS->FreePool (IdeBlkIoDevice);
|
||||||
IdeBlkIoDevice = NULL;
|
IdeBlkIoDevice = NULL;
|
||||||
|
|
||||||
@ -1553,8 +1571,14 @@ AtaNonDataCommandIn (
|
|||||||
|
|
||||||
//
|
//
|
||||||
// Wait for command completion
|
// Wait for command completion
|
||||||
|
// For ATA_SMART_CMD, we may need more timeout to let device
|
||||||
|
// adjust internal states.
|
||||||
//
|
//
|
||||||
Status = WaitForBSYClear (IdeDev, ATATIMEOUT);
|
if (AtaCommand == ATA_SMART_CMD) {
|
||||||
|
Status = WaitForBSYClear (IdeDev, ATASMARTTIMEOUT);
|
||||||
|
} else {
|
||||||
|
Status = WaitForBSYClear (IdeDev, ATATIMEOUT);
|
||||||
|
}
|
||||||
if (EFI_ERROR (Status)) {
|
if (EFI_ERROR (Status)) {
|
||||||
return EFI_DEVICE_ERROR;
|
return EFI_DEVICE_ERROR;
|
||||||
}
|
}
|
||||||
@ -1716,12 +1740,11 @@ SetDriveParameters (
|
|||||||
//
|
//
|
||||||
// Send Init drive parameters
|
// Send Init drive parameters
|
||||||
//
|
//
|
||||||
Status = AtaPioDataIn (
|
Status = AtaNonDataCommandIn (
|
||||||
IdeDev,
|
IdeDev,
|
||||||
NULL,
|
|
||||||
0,
|
|
||||||
INIT_DRIVE_PARAM_CMD,
|
INIT_DRIVE_PARAM_CMD,
|
||||||
(UINT8) (DeviceSelect + DriveParameters->Heads),
|
(UINT8) (DeviceSelect + DriveParameters->Heads),
|
||||||
|
0,
|
||||||
DriveParameters->Sector,
|
DriveParameters->Sector,
|
||||||
0,
|
0,
|
||||||
0,
|
0,
|
||||||
@ -1731,18 +1754,16 @@ SetDriveParameters (
|
|||||||
//
|
//
|
||||||
// Send Set Multiple parameters
|
// Send Set Multiple parameters
|
||||||
//
|
//
|
||||||
Status = AtaPioDataIn (
|
Status = AtaNonDataCommandIn (
|
||||||
IdeDev,
|
IdeDev,
|
||||||
NULL,
|
|
||||||
0,
|
|
||||||
SET_MULTIPLE_MODE_CMD,
|
SET_MULTIPLE_MODE_CMD,
|
||||||
DeviceSelect,
|
DeviceSelect,
|
||||||
|
0,
|
||||||
DriveParameters->MultipleSector,
|
DriveParameters->MultipleSector,
|
||||||
0,
|
0,
|
||||||
0,
|
0,
|
||||||
0
|
0
|
||||||
);
|
);
|
||||||
|
|
||||||
return Status;
|
return Status;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1769,13 +1790,13 @@ EnableInterrupt (
|
|||||||
|
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Clear pending IDE interrupt before OS loader/kernel take control of the IDE device.
|
Clear pending IDE interrupt before OS loader/kernel take control of the IDE device.
|
||||||
|
|
||||||
@param[in] Event Pointer to this event
|
@param[in] Event Pointer to this event
|
||||||
@param[in] Context Event hanlder private data
|
@param[in] Context Event hanlder private data
|
||||||
|
|
||||||
|
|
||||||
**/
|
**/
|
||||||
VOID
|
VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
|
@ -198,6 +198,19 @@ DiscoverIdeDevice (
|
|||||||
)
|
)
|
||||||
;
|
;
|
||||||
|
|
||||||
|
/**
|
||||||
|
This interface is used to initialize all state data related to the
|
||||||
|
detection of one channel.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS Completed successfully.
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
InitializeIDEChannelData (
|
||||||
|
VOID
|
||||||
|
)
|
||||||
|
;
|
||||||
|
|
||||||
/**
|
/**
|
||||||
TODO: Add function description
|
TODO: Add function description
|
||||||
|
|
||||||
@ -661,6 +674,7 @@ PioReadWriteData (
|
|||||||
/**
|
/**
|
||||||
TODO: Add function description
|
TODO: Add function description
|
||||||
|
|
||||||
|
@param IdeDev TODO: add argument description
|
||||||
@param IdeDev TODO: add argument description
|
@param IdeDev TODO: add argument description
|
||||||
|
|
||||||
TODO: add return values
|
TODO: add return values
|
||||||
@ -668,7 +682,8 @@ PioReadWriteData (
|
|||||||
**/
|
**/
|
||||||
EFI_STATUS
|
EFI_STATUS
|
||||||
AtapiTestUnitReady (
|
AtapiTestUnitReady (
|
||||||
IN IDE_BLK_IO_DEV *IdeDev
|
IN IDE_BLK_IO_DEV *IdeDev,
|
||||||
|
OUT UINTN *SenseCount
|
||||||
)
|
)
|
||||||
;
|
;
|
||||||
|
|
||||||
@ -691,6 +706,7 @@ AtapiRequestSense (
|
|||||||
/**
|
/**
|
||||||
TODO: Add function description
|
TODO: Add function description
|
||||||
|
|
||||||
|
@param IdeDev TODO: add argument description
|
||||||
@param IdeDev TODO: add argument description
|
@param IdeDev TODO: add argument description
|
||||||
|
|
||||||
TODO: add return values
|
TODO: add return values
|
||||||
@ -698,7 +714,8 @@ AtapiRequestSense (
|
|||||||
**/
|
**/
|
||||||
EFI_STATUS
|
EFI_STATUS
|
||||||
AtapiReadCapacity (
|
AtapiReadCapacity (
|
||||||
IN IDE_BLK_IO_DEV *IdeDev
|
IN IDE_BLK_IO_DEV *IdeDev,
|
||||||
|
OUT UINTN *SenseCount
|
||||||
)
|
)
|
||||||
;
|
;
|
||||||
|
|
||||||
@ -819,82 +836,32 @@ AtapiBlkIoWriteBlocks (
|
|||||||
/**
|
/**
|
||||||
TODO: Add function description
|
TODO: Add function description
|
||||||
|
|
||||||
@param SenseData TODO: add argument description
|
@param IdeDev TODO: add argument description
|
||||||
@param SenseCounts TODO: add argument description
|
@param SenseCount TODO: add argument description
|
||||||
|
@param Result TODO: add argument description
|
||||||
|
|
||||||
TODO: add return values
|
TODO: add return values
|
||||||
|
|
||||||
**/
|
**/
|
||||||
BOOLEAN
|
EFI_STATUS
|
||||||
IsNoMedia (
|
ParseSenseData (
|
||||||
IN REQUEST_SENSE_DATA *SenseData,
|
IN IDE_BLK_IO_DEV *IdeDev,
|
||||||
IN UINTN SenseCounts
|
IN UINTN SenseCount,
|
||||||
|
OUT SENSE_RESULT *Result
|
||||||
)
|
)
|
||||||
;
|
;
|
||||||
|
|
||||||
/**
|
/**
|
||||||
TODO: Add function description
|
TODO: Add function description
|
||||||
|
|
||||||
@param SenseData TODO: add argument description
|
@param IdeDev TODO: add argument description
|
||||||
@param SenseCounts TODO: add argument description
|
|
||||||
|
|
||||||
TODO: add return values
|
TODO: add return values
|
||||||
|
|
||||||
**/
|
**/
|
||||||
BOOLEAN
|
EFI_STATUS
|
||||||
IsMediaError (
|
AtapiReadPendingData (
|
||||||
IN REQUEST_SENSE_DATA *SenseData,
|
IN IDE_BLK_IO_DEV *IdeDev
|
||||||
IN UINTN SenseCounts
|
|
||||||
)
|
|
||||||
;
|
|
||||||
|
|
||||||
/**
|
|
||||||
TODO: Add function description
|
|
||||||
|
|
||||||
@param SenseData TODO: add argument description
|
|
||||||
@param SenseCounts TODO: add argument description
|
|
||||||
|
|
||||||
TODO: add return values
|
|
||||||
|
|
||||||
**/
|
|
||||||
BOOLEAN
|
|
||||||
IsMediaChange (
|
|
||||||
IN REQUEST_SENSE_DATA *SenseData,
|
|
||||||
IN UINTN SenseCounts
|
|
||||||
)
|
|
||||||
;
|
|
||||||
|
|
||||||
/**
|
|
||||||
TODO: Add function description
|
|
||||||
|
|
||||||
@param SenseData TODO: add argument description
|
|
||||||
@param SenseCounts TODO: add argument description
|
|
||||||
@param NeedRetry TODO: add argument description
|
|
||||||
|
|
||||||
TODO: add return values
|
|
||||||
|
|
||||||
**/
|
|
||||||
BOOLEAN
|
|
||||||
IsDriveReady (
|
|
||||||
IN REQUEST_SENSE_DATA *SenseData,
|
|
||||||
IN UINTN SenseCounts,
|
|
||||||
OUT BOOLEAN *NeedRetry
|
|
||||||
)
|
|
||||||
;
|
|
||||||
|
|
||||||
/**
|
|
||||||
TODO: Add function description
|
|
||||||
|
|
||||||
@param SenseData TODO: add argument description
|
|
||||||
@param SenseCounts TODO: add argument description
|
|
||||||
|
|
||||||
TODO: add return values
|
|
||||||
|
|
||||||
**/
|
|
||||||
BOOLEAN
|
|
||||||
HaveSenseKey (
|
|
||||||
IN REQUEST_SENSE_DATA *SenseData,
|
|
||||||
IN UINTN SenseCounts
|
|
||||||
)
|
)
|
||||||
;
|
;
|
||||||
|
|
||||||
@ -1304,6 +1271,7 @@ EnableInterrupt (
|
|||||||
IN IDE_BLK_IO_DEV *IdeDev
|
IN IDE_BLK_IO_DEV *IdeDev
|
||||||
)
|
)
|
||||||
;
|
;
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Clear pending IDE interrupt before OS loader/kernel take control of the IDE device.
|
Clear pending IDE interrupt before OS loader/kernel take control of the IDE device.
|
||||||
|
|
||||||
|
@ -183,7 +183,6 @@ IDEBusDriverBindingStart (
|
|||||||
UINTN DataSize;
|
UINTN DataSize;
|
||||||
UINT32 Attributes;
|
UINT32 Attributes;
|
||||||
IDE_BUS_DRIVER_PRIVATE_DATA *IdeBusDriverPrivateData;
|
IDE_BUS_DRIVER_PRIVATE_DATA *IdeBusDriverPrivateData;
|
||||||
EFI_EVENT Event;
|
|
||||||
|
|
||||||
//
|
//
|
||||||
// Local variables declaration for IdeControllerInit support
|
// Local variables declaration for IdeControllerInit support
|
||||||
@ -417,6 +416,12 @@ IDEBusDriverBindingStart (
|
|||||||
EfiIdeBusBeforeDevicePresenceDetection,
|
EfiIdeBusBeforeDevicePresenceDetection,
|
||||||
IdeChannel
|
IdeChannel
|
||||||
);
|
);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Prepare to detect IDE device of this channel
|
||||||
|
//
|
||||||
|
InitializeIDEChannelData ();
|
||||||
|
|
||||||
//
|
//
|
||||||
// -- 1st inner loop --- Master/Slave ------------ Step14
|
// -- 1st inner loop --- Master/Slave ------------ Step14
|
||||||
//
|
//
|
||||||
@ -488,6 +493,15 @@ IDEBusDriverBindingStart (
|
|||||||
IdeBlkIoDevicePtr->IdeBusDriverPrivateData = IdeBusDriverPrivateData;
|
IdeBlkIoDevicePtr->IdeBusDriverPrivateData = IdeBusDriverPrivateData;
|
||||||
IdeBlkIoDevicePtr->IoPort->BusMasterBaseAddr = IdeRegsBaseAddr[IdeChannel].BusMasterBaseAddr;
|
IdeBlkIoDevicePtr->IoPort->BusMasterBaseAddr = IdeRegsBaseAddr[IdeChannel].BusMasterBaseAddr;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Report Status code: is about to detect IDE drive
|
||||||
|
//
|
||||||
|
REPORT_STATUS_CODE_WITH_DEVICE_PATH (
|
||||||
|
EFI_PROGRESS_CODE,
|
||||||
|
(EFI_IO_BUS_ATA_ATAPI | EFI_P_PC_PRESENCE_DETECT),
|
||||||
|
IdeBlkIoDevicePtr->DevicePath
|
||||||
|
);
|
||||||
|
|
||||||
//
|
//
|
||||||
// Discover device, now!
|
// Discover device, now!
|
||||||
//
|
//
|
||||||
@ -523,7 +537,6 @@ IDEBusDriverBindingStart (
|
|||||||
// Submit identify data to IDE controller init driver
|
// Submit identify data to IDE controller init driver
|
||||||
//
|
//
|
||||||
CopyMem (&IdentifyData, IdeBlkIoDevicePtr->pIdData, sizeof (IdentifyData));
|
CopyMem (&IdentifyData, IdeBlkIoDevicePtr->pIdData, sizeof (IdentifyData));
|
||||||
// IdentifyData = *IdeBlkIoDevicePtr->pIdData;
|
|
||||||
IdeBusDriverPrivateData->DeviceFound[IdeChannel * 2 + IdeDevice] = TRUE;
|
IdeBusDriverPrivateData->DeviceFound[IdeChannel * 2 + IdeDevice] = TRUE;
|
||||||
IdeInit->SubmitData (IdeInit, IdeChannel, IdeDevice, &IdentifyData);
|
IdeInit->SubmitData (IdeInit, IdeChannel, IdeDevice, &IdentifyData);
|
||||||
} else {
|
} else {
|
||||||
@ -706,10 +719,9 @@ IDEBusDriverBindingStart (
|
|||||||
EFI_TPL_NOTIFY,
|
EFI_TPL_NOTIFY,
|
||||||
ClearInterrupt,
|
ClearInterrupt,
|
||||||
IdeBlkIoDevicePtr,
|
IdeBlkIoDevicePtr,
|
||||||
&Event
|
&IdeBlkIoDevicePtr->ExitBootServiceEvent
|
||||||
);
|
);
|
||||||
|
|
||||||
|
|
||||||
//
|
//
|
||||||
// end of 2nd inner loop ----
|
// end of 2nd inner loop ----
|
||||||
//
|
//
|
||||||
@ -1028,7 +1040,8 @@ IDEBlkIoReset (
|
|||||||
//
|
//
|
||||||
// for ATA device, using ATA reset method
|
// for ATA device, using ATA reset method
|
||||||
//
|
//
|
||||||
if (IdeBlkIoDevice->Type == IdeHardDisk) {
|
if (IdeBlkIoDevice->Type == IdeHardDisk ||
|
||||||
|
IdeBlkIoDevice->Type == Ide48bitAddressingHardDisk) {
|
||||||
return AtaSoftReset (IdeBlkIoDevice);
|
return AtaSoftReset (IdeBlkIoDevice);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -28,6 +28,10 @@
|
|||||||
#define MAX_IDE_CHANNELS 2
|
#define MAX_IDE_CHANNELS 2
|
||||||
#define MAX_IDE_DRIVES 2
|
#define MAX_IDE_DRIVES 2
|
||||||
|
|
||||||
|
#define INVALID_DEVICE_TYPE 0xff
|
||||||
|
#define ATA_DEVICE_TYPE 0x00
|
||||||
|
#define ATAPI_DEVICE_TYPE 0x01
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
BOOLEAN HaveScannedDevice[MAX_IDE_DEVICE];
|
BOOLEAN HaveScannedDevice[MAX_IDE_DEVICE];
|
||||||
BOOLEAN DeviceFound[MAX_IDE_DEVICE];
|
BOOLEAN DeviceFound[MAX_IDE_DEVICE];
|
||||||
@ -67,6 +71,11 @@ typedef struct {
|
|||||||
UINT8 SenseDataNumber;
|
UINT8 SenseDataNumber;
|
||||||
UINT8 *Cache;
|
UINT8 *Cache;
|
||||||
|
|
||||||
|
//
|
||||||
|
// ExitBootService Event, it is used to clear pending IDE interrupt
|
||||||
|
//
|
||||||
|
EFI_EVENT ExitBootServiceEvent;
|
||||||
|
|
||||||
EFI_UNICODE_STRING_TABLE *ControllerNameTable;
|
EFI_UNICODE_STRING_TABLE *ControllerNameTable;
|
||||||
} IDE_BLK_IO_DEV;
|
} IDE_BLK_IO_DEV;
|
||||||
|
|
||||||
|
@ -76,6 +76,16 @@ typedef enum {
|
|||||||
IdeUnknown
|
IdeUnknown
|
||||||
} IDE_DEVICE_TYPE;
|
} IDE_DEVICE_TYPE;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
SenseNoSenseKey,
|
||||||
|
SenseDeviceNotReadyNoRetry,
|
||||||
|
SenseDeviceNotReadyNeedRetry,
|
||||||
|
SenseNoMedia,
|
||||||
|
SenseMediaChange,
|
||||||
|
SenseMediaError,
|
||||||
|
SenseOtherSense
|
||||||
|
} SENSE_RESULT;
|
||||||
|
|
||||||
//
|
//
|
||||||
// IDE Registers
|
// IDE Registers
|
||||||
//
|
//
|
||||||
@ -234,6 +244,11 @@ typedef struct {
|
|||||||
//
|
//
|
||||||
#define ATAPILONGTIMEOUT 5000
|
#define ATAPILONGTIMEOUT 5000
|
||||||
|
|
||||||
|
//
|
||||||
|
// 10 seconds
|
||||||
|
//
|
||||||
|
#define ATASMARTTIMEOUT 10000
|
||||||
|
|
||||||
//
|
//
|
||||||
// ATA Commands Code
|
// ATA Commands Code
|
||||||
//
|
//
|
||||||
|
Loading…
x
Reference in New Issue
Block a user