mirror of
https://github.com/acidanthera/audk.git
synced 2025-04-08 17:05:09 +02:00
1. Added comments to ASM files
2. Fixed a bug in 64-bit AsmDisablePaging64(), which may cause a #GP exception. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2206 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
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@ -33,7 +33,7 @@
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;------------------------------------------------------------------------------
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CpuFlushTlb PROC
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mov eax, cr3
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mov cr3, eax
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mov cr3, eax ; moving to CR3 flushes TLB
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ret
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CpuFlushTlb ENDP
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@ -33,18 +33,18 @@
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; );
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;------------------------------------------------------------------------------
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InternalMathDivRemU64x32 PROC
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mov ecx, [esp + 12]
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mov eax, [esp + 8]
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mov ecx, [esp + 12] ; ecx <- divisor
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mov eax, [esp + 8] ; eax <- dividend[32..63]
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xor edx, edx
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div ecx
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div ecx ; eax <- quotient[32..63], edx <- remainder
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push eax
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mov eax, [esp + 8]
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div ecx
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mov ecx, [esp + 20]
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mov eax, [esp + 8] ; eax <- dividend[0..31]
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div ecx ; eax <- quotient[0..31]
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mov ecx, [esp + 20] ; ecx <- Remainder
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jecxz @F ; abandon remainder if Remainder == NULL
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mov [ecx], edx
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@@:
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pop edx
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pop edx ; edx <- quotient[32..63]
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ret
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InternalMathDivRemU64x32 ENDP
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@ -36,13 +36,13 @@ EXTERN InternalMathDivRemU64x32:PROC
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; );
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;------------------------------------------------------------------------------
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InternalMathDivRemU64x64 PROC
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mov ecx, [esp + 16]
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mov ecx, [esp + 16] ; ecx <- divisor[32..63]
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test ecx, ecx
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jnz _@DivRemU64x64 ; call _@DivRemU64x64 if Divisor > 2^32
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mov ecx, [esp + 20]
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jecxz @F
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and dword ptr [ecx + 4], 0
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mov [esp + 16], ecx
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and dword ptr [ecx + 4], 0 ; zero high dword of remainder
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mov [esp + 16], ecx ; set up stack frame to match DivRemU64x32
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@@:
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jmp InternalMathDivRemU64x32
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InternalMathDivRemU64x64 ENDP
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@ -61,11 +61,11 @@ _@DivRemU64x64 PROC USES ebx esi edi
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jnz @B
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div ebx
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mov ebx, eax ; ebx <- quotient
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mov ecx, [esp + 28]
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mul dword ptr [esp + 24]
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imul ecx, ebx
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add edx, ecx
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mov ecx, dword ptr [esp + 32]
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mov ecx, [esp + 28] ; ecx <- high dword of divisor
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mul dword ptr [esp + 24] ; edx:eax <- quotient * divisor[0..31]
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imul ecx, ebx ; ecx <- quotient * divisor[32..63]
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add edx, ecx ; edx <- (quotient * divisor)[32..63]
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mov ecx, dword ptr [esp + 32] ; ecx <- addr for Remainder
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jc @TooLarge ; product > 2^64
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cmp edi, edx ; compare high 32 bits
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ja @Correct
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@ -76,7 +76,7 @@ _@DivRemU64x64 PROC USES ebx esi edi
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dec ebx ; adjust quotient by -1
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jecxz @Return ; return if Remainder == NULL
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sub eax, dword ptr [esp + 24]
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sbb edx, dword ptr [esp + 28]
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sbb edx, dword ptr [esp + 28] ; edx:eax <- (quotient - 1) * divisor
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@Correct:
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jecxz @Return
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sub esi, eax
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@ -85,7 +85,7 @@ _@DivRemU64x64 PROC USES ebx esi edi
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mov [ecx + 4], edi
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@Return:
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mov eax, ebx ; eax <- quotient
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xor edx, edx
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xor edx, edx ; quotient is 32 bits long
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ret
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_@DivRemU64x64 ENDP
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@ -40,14 +40,14 @@ InternalX86EnablePaging32 PROC
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mov ecx, [esp + 8]
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mov edx, [esp + 12]
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pushfd
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pop edi
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pop edi ; save flags in edi
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cli
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mov eax, cr0
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bts eax, 31
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mov esp, [esp + 16]
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mov cr0, eax
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push edi
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popfd
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popfd ; restore flags
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push edx
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push ecx
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call ebx
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@ -47,11 +47,11 @@ InternalX86EnablePaging64 PROC
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or ah, 1 ; set LME
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wrmsr
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mov eax, cr0
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bts eax, 31
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bts eax, 31 ; set PG
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mov cr0, eax ; enable paging
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retf
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retf ; topmost 2 dwords hold the address
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@@: ; long mode starts here
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DB 67h, 48h
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DB 67h, 48h ; 32-bit address size, 64-bit operand size
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mov ebx, [esp] ; mov rbx, [esp]
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DB 67h, 48h
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mov ecx, [esp + 8] ; mov rcx, [esp + 8]
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@ -62,7 +62,7 @@ InternalX86EnablePaging64 PROC
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DB 48h
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add esp, -20h ; add rsp, -20h
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call ebx ; call rbx
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jmp $
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hlt ; no one should get here
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InternalX86EnablePaging64 ENDP
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END
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@ -34,7 +34,7 @@
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; );
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;------------------------------------------------------------------------------
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InternalX86FxRestore PROC
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mov eax, [esp + 4]
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mov eax, [esp + 4] ; Buffer must be 16-byte aligned
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fxrstor [eax]
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ret
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InternalX86FxRestore ENDP
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@ -34,7 +34,7 @@
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; );
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;------------------------------------------------------------------------------
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InternalX86FxSave PROC
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mov eax, [esp + 4]
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mov eax, [esp + 4] ; Buffer must be 16-byte aligned
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fxsave [eax]
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ret
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InternalX86FxSave ENDP
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@ -40,7 +40,7 @@ InternalLongJump PROC
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mov edi, [edx + 8]
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mov ebp, [edx + 12]
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mov esp, [edx + 16]
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jmp dword ptr [edx + 20]
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jmp dword ptr [edx + 20] ; restore "eip"
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InternalLongJump ENDP
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END
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@ -32,15 +32,15 @@
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; );
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;------------------------------------------------------------------------------
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InternalMathMultU64x64 PROC USES ebx
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mov ebx, [esp + 8]
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mov edx, [esp + 16]
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mov ebx, [esp + 8] ; ebx <- M1[0..31]
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mov edx, [esp + 16] ; edx <- M2[0..31]
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mov ecx, ebx
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mov eax, edx
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imul ebx, [esp + 20]
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imul edx, [esp + 12]
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add ebx, edx
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mul ecx
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add edx, ebx
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imul ebx, [esp + 20] ; ebx <- M1[0..31] * M2[32..63]
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imul edx, [esp + 12] ; edx <- M1[32..63] * M2[0..31]
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add ebx, edx ; carries are abandoned
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mul ecx ; edx:eax <- M1[0..31] * M2[0..31]
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add edx, ebx ; carries are abandoned
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ret
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InternalMathMultU64x64 ENDP
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@ -40,7 +40,7 @@ InternalMathRRotU64 PROC USES ebx
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rol ebx, cl
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shrd edx, ebx, cl
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test cl, 32 ; Count >= 32?
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cmovnz ecx, eax
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cmovnz ecx, eax ; switch eax & edx if Count >= 32
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cmovnz eax, edx
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cmovnz edx, ecx
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ret
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@ -32,10 +32,10 @@
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; );
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;------------------------------------------------------------------------------
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InternalMathRShiftU64 PROC
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mov cl, [esp + 12]
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mov cl, [esp + 12] ; cl <- Count
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xor edx, edx
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mov eax, [esp + 8]
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test cl, 32
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test cl, 32 ; Count >= 32?
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cmovz edx, eax
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cmovz eax, [esp + 4]
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shrd eax, edx, cl
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@ -33,6 +33,13 @@
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; );
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;------------------------------------------------------------------------------
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AsmReadDr4 PROC
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;
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; DR4 is alias to DR6 only if DE (in CR4) is cleared. Otherwise, reading
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; this register will cause a #UD exception.
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;
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; MS assembler doesn't support this instruction since no one would use it
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; under normal circustances. Here opcode is used.
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;
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DB 0fh, 21h, 0e0h
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ret
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AsmReadDr4 ENDP
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@ -33,6 +33,13 @@
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; );
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;------------------------------------------------------------------------------
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AsmReadDr5 PROC
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;
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; DR5 is alias to DR7 only if DE (in CR4) is cleared. Otherwise, reading
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; this register will cause a #UD exception.
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;
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; MS assembler doesn't support this instruction since no one would use it
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; under normal circustances. Here opcode is used.
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;
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DB 0fh, 21h, 0e8h
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ret
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AsmReadDr5 ENDP
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@ -34,16 +34,16 @@ InternalAssertJumpBuffer PROTO C
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;------------------------------------------------------------------------------
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SetJump PROC
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push [esp + 4]
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call InternalAssertJumpBuffer
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pop ecx
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call InternalAssertJumpBuffer ; To validate JumpBuffer
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pop ecx
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pop ecx ; ecx <- return address
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mov edx, [esp]
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mov [edx], ebx
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mov [edx + 4], esi
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mov [edx + 8], edi
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mov [edx + 12], ebp
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mov [edx + 16], esp
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mov [edx + 20], ecx
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mov [edx + 20], ecx ; eip value to restore in LongJump
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xor eax, eax
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jmp ecx
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SetJump ENDP
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@ -33,8 +33,8 @@
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; );
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;------------------------------------------------------------------------------
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InternalMathSwapBytes64 PROC
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mov eax, [esp + 8]
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mov edx, [esp + 4]
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mov eax, [esp + 8] ; eax <- upper 32 bits
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mov edx, [esp + 4] ; edx <- lower 32 bits
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bswap eax
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bswap edx
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ret
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@ -75,6 +75,11 @@ SavedGdt LABEL FWORD
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; by user code. It will be shadowed to somewhere in memory below 1MB.
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;------------------------------------------------------------------------------
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_BackFromUserCode PROC
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;
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; The order of saved registers on the stack matches the order they appears
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; in IA32_REGS structure. This facilitates wrapper function to extract them
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; into that structure.
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;
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push ss
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push cs
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DB 66h
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@ -104,6 +109,11 @@ _ThunkAttr DD ?
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mov eax, ss
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DB 67h
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lea bp, [esp + sizeof (IA32_REGS)]
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;
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; esi's in the following 2 instructions are indeed bp in 16-bit code. Fact
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; is "esi" in 32-bit addressing mode has the same encoding of "bp" in 16-
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; bit addressing mode.
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;
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mov word ptr (IA32_REGS ptr [esi - sizeof (IA32_REGS)])._ESP, bp
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mov ebx, (IA32_REGS ptr [esi - sizeof (IA32_REGS)])._EIP
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shl ax, 4 ; shl eax, 4
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@ -167,7 +177,7 @@ _ToUserCode PROC
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pop fs
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pop gs
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popf ; popfd
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DB 66h
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DB 66h ; Use 32-bit addressing for "retf" below
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retf ; transfer control to user code
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_ToUserCode ENDP
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@ -197,7 +207,7 @@ GdtEnd LABEL QWORD
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; );
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;------------------------------------------------------------------------------
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InternalAsmThunk16 PROC USES ebp ebx esi edi ds es fs gs
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mov esi, [esp + 36] ; esi <- RegSet
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mov esi, [esp + 36] ; esi <- RegSet, the 1st parameter
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movzx edx, (IA32_REGS ptr [esi])._SS
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mov edi, (IA32_REGS ptr [esi])._ESP
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add edi, - (sizeof (IA32_REGS) + 4) ; reserve stack space
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@ -227,11 +237,11 @@ InternalAsmThunk16 PROC USES ebp ebx esi edi ds es fs gs
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push 10h
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pop ecx ; ecx <- selector for data segments
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lgdt fword ptr [edx + (_16Gdtr - SavedCr0)]
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pushfd
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pushfd ; Save df/if indeed
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call fword ptr [edx + (_EntryPoint - SavedCr0)]
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popfd
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lidt fword ptr [esp + 36] ; restore protected mode IDTR
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lea eax, [ebp - sizeof (IA32_REGS)]
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lea eax, [ebp - sizeof (IA32_REGS)] ; eax <- the address of IA32_REGS
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ret
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InternalAsmThunk16 ENDP
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@ -34,6 +34,13 @@
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;------------------------------------------------------------------------------
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AsmWriteDr4 PROC
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mov eax, [esp + 4]
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;
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; DR4 is alias to DR6 only if DE (in CR4) is cleared. Otherwise, writing to
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; this register will cause a #UD exception.
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;
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; MS assembler doesn't support this instruction since no one would use it
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; under normal circustances. Here opcode is used.
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;
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DB 0fh, 23h, 0e0h
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ret
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AsmWriteDr4 ENDP
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@ -34,6 +34,13 @@
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;------------------------------------------------------------------------------
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AsmWriteDr5 PROC
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mov eax, [esp + 4]
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;
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; DR5 is alias to DR7 only if DE (in CR4) is cleared. Otherwise, writing to
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; this register will cause a #UD exception.
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;
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; MS assembler doesn't support this instruction since no one would use it
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; under normal circustances. Here opcode is used.
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;
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DB 0fh, 23h, 0e8h
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ret
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AsmWriteDr5 ENDP
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@ -36,15 +36,14 @@
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;------------------------------------------------------------------------------
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InternalX86DisablePaging64 PROC
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cli
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shl rcx, 32
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shl rcx, 32 ; rcx[32..47] <- Cs
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lea eax, @F
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mov ecx, eax
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push rcx
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mov ebx, edx
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mov esi, r8d
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or rcx, rax ; rcx[0..47] <- Cs:@F
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mov edi, r9d
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mov eax, [rsp + 28h]
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retf
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mov eax, [rsp + 28h] ; eax <- New Stack
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push rcx
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retf ; switch to compatibility mode
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@@:
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mov esp, eax ; set up new stack
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mov rax, cr0
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@ -57,10 +56,10 @@ InternalX86DisablePaging64 PROC
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mov rax, cr4
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and al, NOT (1 SHL 5) ; clear PAE
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mov cr4, rax
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push rdi
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push rsi
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call rbx
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jmp $
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push rdi ; push Context2
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push rsi ; push Context1
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call rdx ; transfer control to EntryPoint
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hlt ; no one should get here
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InternalX86DisablePaging64 ENDP
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END
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@ -36,7 +36,7 @@
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;------------------------------------------------------------------------------
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InternalX86EnablePaging64 PROC
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cli
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pop rax
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pop rax ; skip the return address
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call @Base
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@Base:
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add dword ptr [rsp], @F - @Base ; offset for far retf, seg is the 1st arg
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@ -58,7 +58,7 @@ InternalX86EnablePaging64 PROC
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mov rsp, [esp + 18h]
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add rsp, -20h
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call rbx
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jmp $ ; halt processor if EntryPoint() returned
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hlt ; halt processor if EntryPoint() returned
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InternalX86EnablePaging64 ENDP
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END
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@ -39,7 +39,7 @@ InternalLongJump PROC
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mov r13, [rcx + 30h]
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mov r14, [rcx + 38h]
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mov r15, [rcx + 40h]
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mov rax, rdx
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mov rax, rdx ; set return value
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jmp qword ptr [rcx + 48h]
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InternalLongJump ENDP
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@ -36,7 +36,7 @@ AsmMonitor PROC
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mov eax, ecx
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mov ecx, edx
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mov edx, r8d
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DB 0fh, 1, 0c8h
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DB 0fh, 1, 0c8h ; monitor
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ret
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AsmMonitor ENDP
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@ -34,7 +34,7 @@
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AsmMwait PROC
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mov eax, ecx
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mov ecx, edx
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DB 0fh, 1, 0c9h
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DB 0fh, 1, 0c9h ; mwait
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ret
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AsmMwait ENDP
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@ -31,6 +31,10 @@
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; );
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;------------------------------------------------------------------------------
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AsmReadDr4 PROC
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;
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; There's no obvious reason to access this register, since it's aliased to
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; DR7 when DE=0 or an exception generated when DE=1
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;
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DB 0fh, 21h, 0e0h
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ret
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AsmReadDr4 ENDP
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@ -31,6 +31,10 @@
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; );
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;------------------------------------------------------------------------------
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AsmReadDr5 PROC
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;
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; There's no obvious reason to access this register, since it's aliased to
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; DR7 when DE=0 or an exception generated when DE=1
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;
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DB 0fh, 21h, 0e8h
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ret
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AsmReadDr5 ENDP
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@ -31,6 +31,9 @@
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; );
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;------------------------------------------------------------------------------
|
||||
AsmReadMm0 PROC
|
||||
;
|
||||
; 64-bit MASM doesn't support MMX instructions, so use opcode here
|
||||
;
|
||||
DB 48h, 0fh, 7eh, 0c0h
|
||||
ret
|
||||
AsmReadMm0 ENDP
|
||||
|
||||
@ -31,6 +31,9 @@
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
AsmReadMm1 PROC
|
||||
;
|
||||
; 64-bit MASM doesn't support MMX instructions, so use opcode here
|
||||
;
|
||||
DB 48h, 0fh, 7eh, 0c8h
|
||||
ret
|
||||
AsmReadMm1 ENDP
|
||||
|
||||
@ -31,6 +31,9 @@
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
AsmReadMm2 PROC
|
||||
;
|
||||
; 64-bit MASM doesn't support MMX instructions, so use opcode here
|
||||
;
|
||||
DB 48h, 0fh, 7eh, 0d0h
|
||||
ret
|
||||
AsmReadMm2 ENDP
|
||||
|
||||
@ -31,6 +31,9 @@
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
AsmReadMm3 PROC
|
||||
;
|
||||
; 64-bit MASM doesn't support MMX instructions, so use opcode here
|
||||
;
|
||||
DB 48h, 0fh, 7eh, 0d8h
|
||||
ret
|
||||
AsmReadMm3 ENDP
|
||||
|
||||
@ -31,6 +31,9 @@
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
AsmReadMm4 PROC
|
||||
;
|
||||
; 64-bit MASM doesn't support MMX instructions, so use opcode here
|
||||
;
|
||||
DB 48h, 0fh, 7eh, 0e0h
|
||||
ret
|
||||
AsmReadMm4 ENDP
|
||||
|
||||
@ -31,6 +31,9 @@
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
AsmReadMm5 PROC
|
||||
;
|
||||
; 64-bit MASM doesn't support MMX instructions, so use opcode here
|
||||
;
|
||||
DB 48h, 0fh, 7eh, 0e8h
|
||||
ret
|
||||
AsmReadMm5 ENDP
|
||||
|
||||
@ -31,6 +31,9 @@
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
AsmReadMm6 PROC
|
||||
;
|
||||
; 64-bit MASM doesn't support MMX instructions, so use opcode here
|
||||
;
|
||||
DB 48h, 0fh, 7eh, 0f0h
|
||||
ret
|
||||
AsmReadMm6 ENDP
|
||||
|
||||
@ -31,6 +31,9 @@
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
AsmReadMm7 PROC
|
||||
;
|
||||
; 64-bit MASM doesn't support MMX instructions, so use opcode here
|
||||
;
|
||||
DB 48h, 0fh, 7eh, 0f8h
|
||||
ret
|
||||
AsmReadMm7 ENDP
|
||||
|
||||
@ -66,6 +66,14 @@ SavedGdt LABEL FWORD
|
||||
; by user code. It will be shadowed to somewhere in memory below 1MB.
|
||||
;------------------------------------------------------------------------------
|
||||
_BackFromUserCode PROC
|
||||
;
|
||||
; The order of saved registers on the stack matches the order they appears
|
||||
; in IA32_REGS structure. This facilitates wrapper function to extract them
|
||||
; into that structure.
|
||||
;
|
||||
; Some instructions for manipulation of segment registers have to be written
|
||||
; in opcode since 64-bit MASM prevents accesses to those registers.
|
||||
;
|
||||
DB 16h ; push ss
|
||||
DB 0eh ; push cs
|
||||
DB 66h
|
||||
@ -115,7 +123,7 @@ SavedCr4 DD ?
|
||||
;
|
||||
; rdi in the instruction below is indeed bx in 16-bit code
|
||||
;
|
||||
DB 66h, 2eh
|
||||
DB 66h, 2eh ; 2eh is "cs:" segment override
|
||||
lgdt fword ptr [rdi + (SavedGdt - @Base)]
|
||||
DB 66h
|
||||
mov ecx, 0c0000080h
|
||||
@ -129,9 +137,8 @@ SavedCr0 DD ?
|
||||
@64Eip DD ?
|
||||
SavedCs DW ?
|
||||
@64BitCode:
|
||||
DB 48h, 0b8h ; mov rax, imm64
|
||||
SavedRip DQ ?
|
||||
jmp rax ; return to caller
|
||||
mov rsp, r8 ; restore stack
|
||||
ret
|
||||
_BackFromUserCode ENDP
|
||||
|
||||
_EntryPoint DD _ToUserCode - m16Start
|
||||
@ -160,14 +167,14 @@ _ToUserCode PROC
|
||||
mov cr4, rbp
|
||||
mov ss, esi ; set up 16-bit stack segment
|
||||
mov sp, bx ; set up 16-bit stack pointer
|
||||
DB 66h
|
||||
DB 66h ; make the following call 32-bit
|
||||
call @Base ; push eip
|
||||
@Base:
|
||||
pop bp ; ebp <- address of @Base
|
||||
push [esp + sizeof (IA32_REGS) + 2]
|
||||
lea eax, [rsi + (@RealMode - @Base)]
|
||||
lea eax, [rsi + (@RealMode - @Base)] ; rsi is "bp" in 16-bit code
|
||||
push rax
|
||||
retf
|
||||
retf ; execution begins at next instruction
|
||||
@RealMode:
|
||||
DB 66h, 2eh ; CS and operand size override
|
||||
lidt fword ptr [rsi + (_16Idtr - @Base)]
|
||||
@ -178,7 +185,7 @@ _ToUserCode PROC
|
||||
pop gs
|
||||
popf ; popfd
|
||||
lea sp, [esp + 4] ; skip high order 32 bits of EFlags
|
||||
DB 66h
|
||||
DB 66h ; make the following retf 32-bit
|
||||
retf ; transfer control to user code
|
||||
_ToUserCode ENDP
|
||||
|
||||
@ -220,8 +227,8 @@ GDT_SIZE = $ - _NullSeg
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
InternalAsmThunk16 PROC USES rbp rbx rsi rdi
|
||||
mov r10d, ds
|
||||
mov r11d, es
|
||||
mov r10d, ds ; r9 ~ r11 are not accessible in 16-bit
|
||||
mov r11d, es ; so use them for saving seg registers
|
||||
mov r9d, ss
|
||||
push fs
|
||||
push gs
|
||||
@ -238,8 +245,8 @@ InternalAsmThunk16 PROC USES rbp rbx rsi rdi
|
||||
lea ecx, [rdx + (SavedCr4 - m16Start)]
|
||||
mov eax, edx ; eax <- transition code address
|
||||
and edx, 0fh
|
||||
shl eax, 12
|
||||
lea ax, [rdx + (_BackFromUserCode - m16Start)]
|
||||
shl eax, 12 ; segment address in high order 16 bits
|
||||
lea ax, [rdx + (_BackFromUserCode - m16Start)] ; offset address
|
||||
stosd ; [edi] <- return address of user code
|
||||
sgdt fword ptr [rcx + (SavedGdt - SavedCr4)]
|
||||
sidt fword ptr [rsp + 38h] ; save IDT stack in argument space
|
||||
@ -257,13 +264,12 @@ InternalAsmThunk16 PROC USES rbp rbx rsi rdi
|
||||
pushfq
|
||||
lea edx, [rdx + DATA16 - DATA32]
|
||||
lea r8, @RetFromRealMode
|
||||
mov [rcx + (SavedRip - SavedCr4)], r8
|
||||
push r8
|
||||
mov r8d, cs
|
||||
mov [rcx + (SavedCs - SavedCr4)], r8w
|
||||
mov r8, rsp
|
||||
jmp fword ptr [rcx + (_EntryPoint - SavedCr4)]
|
||||
@RetFromRealMode:
|
||||
mov rsp, r8
|
||||
popfq
|
||||
lidt fword ptr [rsp + 38h] ; restore protected mode IDTR
|
||||
lea eax, [rbp - sizeof (IA32_REGS)]
|
||||
|
||||
@ -31,6 +31,10 @@
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
AsmWriteDr4 PROC
|
||||
;
|
||||
; There's no obvious reason to access this register, since it's aliased to
|
||||
; DR6 when DE=0 or an exception generated when DE=1
|
||||
;
|
||||
DB 0fh, 23h, 0e1h
|
||||
mov rax, rcx
|
||||
ret
|
||||
|
||||
@ -31,6 +31,10 @@
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
AsmWriteDr5 PROC
|
||||
;
|
||||
; There's no obvious reason to access this register, since it's aliased to
|
||||
; DR7 when DE=0 or an exception generated when DE=1
|
||||
;
|
||||
DB 0fh, 23h, 0e9h
|
||||
mov rax, rcx
|
||||
ret
|
||||
|
||||
@ -31,6 +31,9 @@
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
AsmWriteMm0 PROC
|
||||
;
|
||||
; 64-bit MASM doesn't support MMX instructions, so use opcode here
|
||||
;
|
||||
DB 48h, 0fh, 6eh, 0c1h
|
||||
ret
|
||||
AsmWriteMm0 ENDP
|
||||
|
||||
@ -31,6 +31,9 @@
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
AsmWriteMm1 PROC
|
||||
;
|
||||
; 64-bit MASM doesn't support MMX instructions, so use opcode here
|
||||
;
|
||||
DB 48h, 0fh, 6eh, 0c9h
|
||||
ret
|
||||
AsmWriteMm1 ENDP
|
||||
|
||||
@ -31,6 +31,9 @@
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
AsmWriteMm2 PROC
|
||||
;
|
||||
; 64-bit MASM doesn't support MMX instructions, so use opcode here
|
||||
;
|
||||
DB 48h, 0fh, 6eh, 0d1h
|
||||
ret
|
||||
AsmWriteMm2 ENDP
|
||||
|
||||
@ -31,6 +31,9 @@
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
AsmWriteMm3 PROC
|
||||
;
|
||||
; 64-bit MASM doesn't support MMX instructions, so use opcode here
|
||||
;
|
||||
DB 48h, 0fh, 6eh, 0d9h
|
||||
ret
|
||||
AsmWriteMm3 ENDP
|
||||
|
||||
@ -31,6 +31,9 @@
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
AsmWriteMm4 PROC
|
||||
;
|
||||
; 64-bit MASM doesn't support MMX instructions, so use opcode here
|
||||
;
|
||||
DB 48h, 0fh, 6eh, 0e1h
|
||||
ret
|
||||
AsmWriteMm4 ENDP
|
||||
|
||||
@ -31,6 +31,9 @@
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
AsmWriteMm5 PROC
|
||||
;
|
||||
; 64-bit MASM doesn't support MMX instructions, so use opcode here
|
||||
;
|
||||
DB 48h, 0fh, 6eh, 0e9h
|
||||
ret
|
||||
AsmWriteMm5 ENDP
|
||||
|
||||
@ -31,6 +31,9 @@
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
AsmWriteMm6 PROC
|
||||
;
|
||||
; 64-bit MASM doesn't support MMX instructions, so use opcode here
|
||||
;
|
||||
DB 48h, 0fh, 6eh, 0f1h
|
||||
ret
|
||||
AsmWriteMm6 ENDP
|
||||
|
||||
@ -31,6 +31,9 @@
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
AsmWriteMm7 PROC
|
||||
;
|
||||
; 64-bit MASM doesn't support MMX instructions, so use opcode here
|
||||
;
|
||||
DB 48h, 0fh, 6eh, 0f9h
|
||||
ret
|
||||
AsmWriteMm7 ENDP
|
||||
|
||||
@ -32,8 +32,8 @@
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
AsmWriteMsr64 PROC
|
||||
mov rax, rdx
|
||||
shr rdx, 20h
|
||||
mov rax, rdx ; meanwhile, rax <- return value
|
||||
shr rdx, 20h ; edx:eax contains the value to write
|
||||
wrmsr
|
||||
ret
|
||||
AsmWriteMsr64 ENDP
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user