ArmVirtPkg/FdtPciHostBridgeLib: Refactor init/uninit of root bridge

Rebase ArmVirtPkg/FdtPciHostBridgeLib to the new
PciHostBridgeUtilityInitRootBridge()/PciHostBridgeUtilityUninitRootBridge()
utility functions.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Signed-off-by: Yubo Miao <miaoyubo@huawei.com>
Message-Id: <20210119011302.10908-7-cenjiahui@huawei.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>

ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c

@@ -7,6 +7,7 @@
 
 **/
 #include <PiDxe.h>
+#include <Library/BaseMemoryLib.h>
 #include <Library/DebugLib.h>
 #include <Library/DevicePathLib.h>
 #include <Library/DxeServicesTableLib.h>
@@ -20,37 +21,6 @@
 #include <Protocol/PciRootBridgeIo.h>
 #include <Protocol/PciHostBridgeResourceAllocation.h>
 
-#pragma pack(1)
-typedef struct {
-  ACPI_HID_DEVICE_PATH     AcpiDevicePath;
-  EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
-} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
-#pragma pack ()
-
-STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath = {
-  {
-    {
-      ACPI_DEVICE_PATH,
-      ACPI_DP,
-      {
-        (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
-        (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)
-      }
-    },
-    EISA_PNP_ID(0x0A03),
-    0
-  },
-
-  {
-    END_DEVICE_PATH_TYPE,
-    END_ENTIRE_DEVICE_PATH_SUBTYPE,
-    {
-      END_DEVICE_PATH_LENGTH,
-      0
-    }
-  }
-};
-
 //
 // We expect the "ranges" property of "pci-host-ecam-generic" to consist of
 // records like this.
@@ -324,6 +294,13 @@ PciHostBridgeGetRootBridges (
   UINT64                   Mmio64Base, Mmio64Size;
   UINT32                   BusMin, BusMax;
   EFI_STATUS               Status;
+  UINT64                   Attributes;
+  UINT64                   AllocationAttributes;
+  PCI_ROOT_BRIDGE_APERTURE Io;
+  PCI_ROOT_BRIDGE_APERTURE Mem;
+  PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
+  PCI_ROOT_BRIDGE_APERTURE PMem;
+  PCI_ROOT_BRIDGE_APERTURE PMemAbove4G;
 
   if (PcdGet64 (PcdPciExpressBaseAddress) == 0) {
     DEBUG ((EFI_D_INFO, "%a: PCI host bridge not present\n", __FUNCTION__));
@@ -341,33 +318,29 @@ PciHostBridgeGetRootBridges (
     return NULL;
   }
 
-  *Count = 1;
+  ZeroMem (&Io, sizeof (Io));
+  ZeroMem (&Mem, sizeof (Mem));
+  ZeroMem (&MemAbove4G, sizeof (MemAbove4G));
+  ZeroMem (&PMem, sizeof (PMem));
+  ZeroMem (&PMemAbove4G, sizeof (PMemAbove4G));
 
-  mRootBridge.Segment               = 0;
+  Attributes           = EFI_PCI_ATTRIBUTE_ISA_IO_16 |
-  mRootBridge.Supports              = EFI_PCI_ATTRIBUTE_ISA_IO_16 |
                          EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
                          EFI_PCI_ATTRIBUTE_VGA_IO_16  |
                          EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
-  mRootBridge.Attributes            = mRootBridge.Supports;
 
-  mRootBridge.DmaAbove4G            = TRUE;
+  AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
-  mRootBridge.NoExtendedConfigSpace = FALSE;
-  mRootBridge.ResourceAssigned      = FALSE;
 
-  mRootBridge.AllocationAttributes  = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
+  Io.Base              = IoBase;
-
+  Io.Limit             = IoBase + IoSize - 1;
-  mRootBridge.Bus.Base              = BusMin;
+  Mem.Base             = Mmio32Base;
-  mRootBridge.Bus.Limit             = BusMax;
+  Mem.Limit            = Mmio32Base + Mmio32Size - 1;
-  mRootBridge.Io.Base               = IoBase;
-  mRootBridge.Io.Limit              = IoBase + IoSize - 1;
-  mRootBridge.Mem.Base              = Mmio32Base;
-  mRootBridge.Mem.Limit             = Mmio32Base + Mmio32Size - 1;
 
   if (sizeof (UINTN) == sizeof (UINT64)) {
-    mRootBridge.MemAbove4G.Base       = Mmio64Base;
+    MemAbove4G.Base    = Mmio64Base;
-    mRootBridge.MemAbove4G.Limit      = Mmio64Base + Mmio64Size - 1;
+    MemAbove4G.Limit   = Mmio64Base + Mmio64Size - 1;
     if (Mmio64Size > 0) {
-      mRootBridge.AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
+      AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
     }
   } else {
     //
@@ -376,19 +349,41 @@ PciHostBridgeGetRootBridges (
     // BARs unless they are allocated below 4 GB. So ignore the range above
     // 4 GB in this case.
     //
-    mRootBridge.MemAbove4G.Base       = MAX_UINT64;
+    MemAbove4G.Base    = MAX_UINT64;
-    mRootBridge.MemAbove4G.Limit      = 0;
+    MemAbove4G.Limit   = 0;
   }
 
   //
   // No separate ranges for prefetchable and non-prefetchable BARs
   //
-  mRootBridge.PMem.Base             = MAX_UINT64;
+  PMem.Base            = MAX_UINT64;
-  mRootBridge.PMem.Limit            = 0;
+  PMem.Limit           = 0;
-  mRootBridge.PMemAbove4G.Base      = MAX_UINT64;
+  PMemAbove4G.Base     = MAX_UINT64;
-  mRootBridge.PMemAbove4G.Limit     = 0;
+  PMemAbove4G.Limit    = 0;
 
-  mRootBridge.DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath;
+  Status = PciHostBridgeUtilityInitRootBridge (
+    Attributes,
+    Attributes,
+    AllocationAttributes,
+    TRUE,
+    FALSE,
+    BusMin,
+    BusMax,
+    &Io,
+    &Mem,
+    &MemAbove4G,
+    &PMem,
+    &PMemAbove4G,
+    &mRootBridge
+    );
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_ERROR, "%a: failed to initialize PCI host bridge: %r\n",
+      __FUNCTION__, Status));
+    *Count = 0;
+    return NULL;
+  }
+
+  *Count = 1;
 
   return &mRootBridge;
 }
@@ -408,6 +403,7 @@ PciHostBridgeFreeRootBridges (
   )
 {
   ASSERT (Count == 1);
+  PciHostBridgeUtilityUninitRootBridge (Bridges);
 }
 
 /**

ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.inf

@@ -34,6 +34,7 @@
   OvmfPkg/OvmfPkg.dec
 
 [LibraryClasses]
+  BaseMemoryLib
   DebugLib
   DevicePathLib
   DxeServicesTableLib