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IntelFrameworkModulePkg: Refine casting expression result to bigger size 

There are cases that the operands of an expression are all with rank less
than UINT64/INT64 and the result of the expression is explicitly cast to
UINT64/INT64 to fit the target size.

An example will be:
UINT32 a,b;
// a and b can be any unsigned int type with rank less than UINT64, like
// UINT8, UINT16, etc.
UINT64 c;
c = (UINT64) (a + b);

Some static code checkers may warn that the expression result might
overflow within the rank of "int" (integer promotions) and the result is
then cast to a bigger size.

The commit refines codes by the following rules:
1). When the expression is possible to overflow the range of unsigned int/
int:
c = (UINT64)a + b;

2). When the expression will not overflow within the rank of "int", remove
the explicit type casts:
c = a + b;

3). When the expression will be cast to pointer of possible greater size:
UINT32 a,b;
VOID *c;
c = (VOID *)(UINTN)(a + b); --> c = (VOID *)((UINTN)a + b);

4). When one side of a comparison expression contains only operands with
rank less than UINT32:
UINT8 a;
UINT16 b;
UINTN c;
if ((UINTN)(a + b) > c) {...} --> if (((UINT32)a + b) > c) {...}

For rule 4), if we remove the 'UINTN' type cast like:
if (a + b > c) {...}
The VS compiler will complain with warning C4018 (signed/unsigned
mismatch, level 3 warning) due to promoting 'a + b' to type 'int'.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
This commit is contained in:
Hao Wu 2017-01-23 11:24:50 +08:00
parent 64b25f5db1
commit aa5f60ae41
11 changed files with 25 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c
View File

@ -1,7 +1,7 @@
/** @file
ConsoleOut Routines that speak VGA.
Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@ -418,7 +418,7 @@ BiosKeyboardDriverBindingStart (
// Check bit 6 of Feature Byte 2.
// If it is set, then Int 16 Func 09 is supported
//
if (*(UINT8 *)(UINTN) ((Regs.X.ES << 4) + Regs.X.BX + 0x06) & 0x40) {
if (*(UINT8 *) (((UINTN) Regs.X.ES << 4) + Regs.X.BX + 0x06) & 0x40) {
//
// Get Keyboard Functionality
//

4
IntelFrameworkModulePkg/Csm/BiosThunk/Snp16Dxe/BiosSnp16.c
View File

@ -1,6 +1,6 @@
/** @file
Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved.<BR>
Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@ -1858,7 +1858,7 @@ Undi16SimpleNetworkIsr (
CopyMem (
Frame,
(VOID *)(UINTN) ((SimpleNetworkDevice->Isr.FrameSegSel << 4) + SimpleNetworkDevice->Isr.FrameOffset),
(VOID *) (((UINTN) SimpleNetworkDevice->Isr.FrameSegSel << 4) + SimpleNetworkDevice->Isr.FrameOffset),
SimpleNetworkDevice->Isr.BufferLength
);
Frame = Frame + SimpleNetworkDevice->Isr.BufferLength;

14
IntelFrameworkModulePkg/Csm/BiosThunk/Snp16Dxe/Misc.c
View File

@ -1,7 +1,7 @@
/** @file
Helper Routines that use a PXE-enabled NIC option ROM.
Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved.<BR>
Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@ -49,7 +49,7 @@ CacheVectorAddress (
{
UINT32 *Address;
Address = (UINT32 *)(UINTN) (IVT_BASE + VectorNumber * 4);
Address = (UINT32 *) ((UINTN) IVT_BASE + VectorNumber * 4);
CachedVectorAddress[VectorNumber] = *Address;
return EFI_SUCCESS;
}
@ -68,7 +68,7 @@ RestoreCachedVectorAddress (
{
UINT32 *Address;
Address = (UINT32 *)(UINTN) (IVT_BASE + VectorNumber * 4);
Address = (UINT32 *) ((UINTN) IVT_BASE + VectorNumber * 4);
*Address = CachedVectorAddress[VectorNumber];
return EFI_SUCCESS;
}
@ -469,7 +469,7 @@ LaunchBaseCode (
RomIdTableAddress = (UNDI_ROMID_T *) (RomAddress + OPTION_ROM_PTR->PxeRomIdOffset);
if ((UINTN) (OPTION_ROM_PTR->PxeRomIdOffset + RomIdTableAddress->StructLength) > RomLength) {
if (((UINT32)OPTION_ROM_PTR->PxeRomIdOffset + RomIdTableAddress->StructLength) > RomLength) {
DEBUG ((DEBUG_ERROR, "ROM ID Offset Error\n\r"));
return EFI_NOT_FOUND;
}
@ -754,10 +754,10 @@ LaunchBaseCode (
Print_Undi_Loader_Table (UndiLoaderTable);
DEBUG ((DEBUG_NET, "Display the PXENV+ and !PXE tables exported by NIC\n\r"));
Print_PXENV_Table ((VOID *)(UINTN)((UndiLoaderTable->PXENVptr.Segment << 4) | UndiLoaderTable->PXENVptr.Offset));
Print_PXE_Table ((VOID *)(UINTN)((UndiLoaderTable->PXEptr.Segment << 4) + UndiLoaderTable->PXEptr.Offset));
Print_PXENV_Table ((VOID *)(((UINTN)UndiLoaderTable->PXENVptr.Segment << 4) | UndiLoaderTable->PXENVptr.Offset));
Print_PXE_Table ((VOID *)(((UINTN)UndiLoaderTable->PXEptr.Segment << 4) + UndiLoaderTable->PXEptr.Offset));
Pxe = (PXE_T *)(UINTN)((UndiLoaderTable->PXEptr.Segment << 4) + UndiLoaderTable->PXEptr.Offset);
Pxe = (PXE_T *)(((UINTN)UndiLoaderTable->PXEptr.Segment << 4) + UndiLoaderTable->PXEptr.Offset);
SimpleNetworkDevice->Nii.Id = (UINT64)(UINTN) Pxe;
gBS->FreePool (Buffer);

4
IntelFrameworkModulePkg/Csm/BiosThunk/VideoDxe/BiosVideo.c
View File

@ -1,7 +1,7 @@
/** @file
ConsoleOut Routines that speak VGA.
Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@ -1714,7 +1714,7 @@ BiosVideoCheckForVbe (
//
// Make sure the FrameBufferSize does not exceed the max available frame buffer size reported by VEB.
//
ASSERT (CurrentModeData->FrameBufferSize <= (UINTN)(BiosVideoPrivate->VbeInformationBlock->TotalMemory * 64 * 1024));
ASSERT (CurrentModeData->FrameBufferSize <= ((UINT32)BiosVideoPrivate->VbeInformationBlock->TotalMemory * 64 * 1024));
BiosVideoPrivate->ModeData = ModeBuffer;
}

6
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
View File

@ -1,6 +1,6 @@
/** @file
Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@ -144,7 +144,7 @@ LegacyBiosGetLegacyRegion (
);
if (Regs.X.AX == 0) {
*LegacyMemoryAddress = (VOID *) (UINTN) ((Regs.X.DS << 4) + Regs.X.BX);
*LegacyMemoryAddress = (VOID *) (((UINTN) Regs.X.DS << 4) + Regs.X.BX);
Status = EFI_SUCCESS;
} else {
Status = EFI_OUT_OF_RESOURCES;
@ -728,7 +728,7 @@ InstallSmbiosEventCallback (
}
if ((mStructureTableAddress != 0) &&
(mStructureTablePages < (UINTN) EFI_SIZE_TO_PAGES (EntryPointStructure->TableLength))) {
(mStructureTablePages < EFI_SIZE_TO_PAGES ((UINT32)EntryPointStructure->TableLength))) {
//
// If original buffer is not enough for the new SMBIOS table, free original buffer and re-allocate
//

4
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c
View File

@ -1,6 +1,6 @@
/** @file
Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@ -91,7 +91,7 @@ PrintBbsTable (
//
// Print DescString
//
String = (CHAR8 *)(UINTN)((BbsTable[Index].DescStringSegment << 4) + BbsTable[Index].DescStringOffset);
String = (CHAR8 *)(((UINTN)BbsTable[Index].DescStringSegment << 4) + BbsTable[Index].DescStringOffset);
if (String != NULL) {
DEBUG ((EFI_D_INFO," ("));
for (SubIndex = 0; String[SubIndex] != 0; SubIndex++) {

2
IntelFrameworkModulePkg/Library/GenericBdsLib/BdsBoot.c
View File

@ -227,7 +227,7 @@ BdsBuildLegacyDevNameString (
//
// If current BBS entry has its description then use it.
//
StringDesc = (UINT8 *) (UINTN) ((CurBBSEntry->DescStringSegment << 4) + CurBBSEntry->DescStringOffset);
StringDesc = (UINT8 *) (((UINTN) CurBBSEntry->DescStringSegment << 4) + CurBBSEntry->DescStringOffset);
if (NULL != StringDesc) {
//
// Only get fisrt 32 characters, this is suggested by BBS spec

4
IntelFrameworkModulePkg/Library/GenericBdsLib/BdsMisc.c
View File

@ -569,11 +569,11 @@ CharToUint (
)
{
if ((Char >= L'0') && (Char <= L'9')) {
return (UINTN) (Char - L'0');
return (Char - L'0');
}
if ((Char >= L'A') && (Char <= L'F')) {
return (UINTN) (Char - L'A' + 0xA);
return (Char - L'A' + 0xA);
}
ASSERT (FALSE);

2
IntelFrameworkModulePkg/Library/LegacyBootManagerLib/LegacyBm.c
View File

@ -176,7 +176,7 @@ LegacyBmBuildLegacyDevNameString (
//
// If current BBS entry has its description then use it.
//
StringDesc = (CHAR8 *) (UINTN) ((CurBBSEntry->DescStringSegment << 4) + CurBBSEntry->DescStringOffset);
StringDesc = (CHAR8 *) (((UINTN) CurBBSEntry->DescStringSegment << 4) + CurBBSEntry->DescStringOffset);
if (NULL != StringDesc) {
//
// Only get fisrt 32 characters, this is suggested by BBS spec

2
IntelFrameworkModulePkg/Universal/BdsDxe/FrontPage.c
View File

@ -620,7 +620,7 @@ ConvertProcessorToString (
if (Base10Exponent >= 6) {
FreqMhz = ProcessorFrequency;
for (Index = 0; Index < (UINTN) (Base10Exponent - 6); Index++) {
for (Index = 0; Index < ((UINT32)Base10Exponent - 6); Index++) {
FreqMhz *= 10;
}
} else {

4
IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c
View File

@ -1,7 +1,7 @@
/** @file
Uses the services of the I/O Library to produce the CPU I/O Protocol
Copyright (c) 2004 - 2012, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2004 - 2017, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
This program and the accompanying materials
@ -141,7 +141,7 @@ CpuIoCheckParameter (
//
// Check to see if Address is aligned
//
if ((Address & (UINT64)(mInStride[Width] - 1)) != 0) {
if ((Address & ((UINT64)mInStride[Width] - 1)) != 0) {
return EFI_UNSUPPORTED;
}