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ArmPlatformPkg: Update PL011 Serial PCDs to Fixed PCDs 

The PCDs used in the PL011 UART Driver and Serial Port Library are
inherently "fixed at build".  This change updates the source to use
Fixed PCDs for these values.  This improves clarity and efficiency.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
This commit is contained in:
Evan Lloyd 2016-06-15 13:52:39 +01:00 committed by Ard Biesheuvel
parent 9f08a052a3
commit aadc64e6a1
4 changed files with 20 additions and 20 deletions
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10
ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c
View File

@ -168,17 +168,17 @@ PL011UartInitializePort (
//
// If PL011 Integer value has been defined then always ignore the BAUD rate
if (PcdGet32 (PL011UartInteger) != 0) {
MmioWrite32 (UartBase + UARTIBRD, PcdGet32 (PL011UartInteger));
MmioWrite32 (UartBase + UARTFBRD, PcdGet32 (PL011UartFractional));
if (FixedPcdGet32 (PL011UartInteger) != 0) {
MmioWrite32 (UartBase + UARTIBRD, FixedPcdGet32 (PL011UartInteger));
MmioWrite32 (UartBase + UARTFBRD, FixedPcdGet32 (PL011UartFractional));
} else {
// If BAUD rate is zero then replace it with the system default value
if (*BaudRate == 0) {
*BaudRate = PcdGet32 (PcdSerialBaudRate);
*BaudRate = FixedPcdGet32 (PcdSerialBaudRate);
ASSERT (*BaudRate != 0);
}
Divisor = (PcdGet32 (PL011UartClkInHz) * 4) / *BaudRate;
Divisor = (FixedPcdGet32 (PL011UartClkInHz) * 4) / *BaudRate;
MmioWrite32 (UartBase + UARTIBRD, Divisor >> FRACTION_PART_SIZE_IN_BITS);
MmioWrite32 (UartBase + UARTFBRD, Divisor & FRACTION_PART_MASK);
}

4
ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf
View File

@ -2,7 +2,7 @@
#
# Component description file for PL011Uart module
#
# Copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>
# Copyright (c) 2011-2016, ARM Ltd. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@ -34,7 +34,7 @@
MdeModulePkg/MdeModulePkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
[Pcd]
[FixedPcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate
gArmPlatformTokenSpaceGuid.PL011UartClkInHz

22
ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c
View File

@ -43,14 +43,14 @@ SerialPortInitialize (
UINT8 DataBits;
EFI_STOP_BITS_TYPE StopBits;
BaudRate = (UINTN)PcdGet64 (PcdUartDefaultBaudRate);
BaudRate = (UINTN)FixedPcdGet64 (PcdUartDefaultBaudRate);
ReceiveFifoDepth = 0; // Use default FIFO depth
Parity = (EFI_PARITY_TYPE)PcdGet8 (PcdUartDefaultParity);
DataBits = PcdGet8 (PcdUartDefaultDataBits);
StopBits = (EFI_STOP_BITS_TYPE) PcdGet8 (PcdUartDefaultStopBits);
Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity);
DataBits = FixedPcdGet8 (PcdUartDefaultDataBits);
StopBits = (EFI_STOP_BITS_TYPE) FixedPcdGet8 (PcdUartDefaultStopBits);
return PL011UartInitializePort (
(UINTN)PcdGet64 (PcdSerialRegisterBase),
(UINTN)FixedPcdGet64 (PcdSerialRegisterBase),
&BaudRate,
&ReceiveFifoDepth,
&Parity,
@ -76,7 +76,7 @@ SerialPortWrite (
IN UINTN NumberOfBytes
)
{
return PL011UartWrite ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
return PL011UartWrite ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
}
/**
@ -96,7 +96,7 @@ SerialPortRead (
IN UINTN NumberOfBytes
)
{
return PL011UartRead ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
return PL011UartRead ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
}
/**
@ -113,7 +113,7 @@ SerialPortPoll (
VOID
)
{
return PL011UartPoll ((UINTN)PcdGet64 (PcdSerialRegisterBase));
return PL011UartPoll ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase));
}
/**
Set new attributes to PL011.
@ -158,7 +158,7 @@ SerialPortSetAttributes (
)
{
return PL011UartInitializePort (
(UINTN)PcdGet64 (PcdSerialRegisterBase),
(UINTN)FixedPcdGet64 (PcdSerialRegisterBase),
BaudRate,
ReceiveFifoDepth,
Parity,
@ -199,7 +199,7 @@ SerialPortSetControl (
IN UINT32 Control
)
{
return PL011UartSetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);
return PL011UartSetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control);
}
/**
@ -240,5 +240,5 @@ SerialPortGetControl (
OUT UINT32 *Control
)
{
return PL011UartGetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);
return PL011UartGetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control);
}

4
ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
View File

@ -2,7 +2,7 @@
#
# Component description file for PL011SerialPortLib module
#
# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
# Copyright (c) 2011-2016, ARM Ltd. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@ -35,7 +35,7 @@
MdeModulePkg/MdeModulePkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
[Pcd]
[FixedPcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits