mirror of https://github.com/acidanthera/audk.git
ArmVirtualizationPkg/PciHostBridgeDxe: set Root Bridge apertures from PCDs
Our PciHostBridgeDxe module creates one root bridge on the one and only host bridge. The resource apertures of the root bridge (bus range, IO space, MMIO space) are configured with the "mResAperture" array, which at the moment carries static values inherited from PcAtChipsetPkg. Set the array as first thing from the PCDs that we parsed from the device tree. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <Olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16897 6f19259b-4bc3-4df7-8a09-765794883524
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@ -52,9 +52,7 @@ EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {
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}
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};
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PCI_ROOT_BRIDGE_RESOURCE_APERTURE mResAperture[1][1] = {
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{{0, 0xff, 0x80000000, 0xffffffff, 0, 0xffff}}
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};
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STATIC PCI_ROOT_BRIDGE_RESOURCE_APERTURE mResAperture[1][1];
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EFI_HANDLE mDriverImageHandle;
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@ -106,6 +104,18 @@ InitializePciHostBridge (
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mDriverImageHandle = ImageHandle;
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mResAperture[0][0].BusBase = PcdGet32 (PcdPciBusMin);
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mResAperture[0][0].BusLimit = PcdGet32 (PcdPciBusMax);
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mResAperture[0][0].MemBase = PcdGet32 (PcdPciMmio32Base);
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mResAperture[0][0].MemLimit = (UINT64)PcdGet32 (PcdPciMmio32Base) +
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PcdGet32 (PcdPciMmio32Size) - 1;
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mResAperture[0][0].IoBase = PcdGet64 (PcdPciIoBase);
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mResAperture[0][0].IoLimit = PcdGet64 (PcdPciIoBase) +
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PcdGet64 (PcdPciIoSize) - 1;
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mResAperture[0][0].IoTranslation = PcdGet64 (PcdPciIoTranslation);
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//
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// Create Host Bridge Device Handle
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//
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@ -36,6 +36,7 @@
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#include <Library/DevicePathLib.h>
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#include <Library/IoLib.h>
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#include <Library/PciLib.h>
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#include <Library/PcdLib.h>
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//
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// Hard code the host bridge number in the platform.
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@ -403,6 +404,7 @@ typedef struct {
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UINT64 IoBase;
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UINT64 IoLimit;
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UINT64 IoTranslation;
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} PCI_ROOT_BRIDGE_RESOURCE_APERTURE;
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typedef enum {
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@ -23,6 +23,7 @@
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[Packages]
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MdePkg/MdePkg.dec
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ArmPlatformPkg/ArmPlatformPkg.dec
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[LibraryClasses]
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UefiDriverEntryPoint
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@ -36,6 +37,7 @@
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DevicePathLib
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IoLib
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PciLib
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PcdLib
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[Sources]
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PciHostBridge.c
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@ -48,5 +50,14 @@
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gEfiMetronomeArchProtocolGuid ## CONSUMES
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gEfiDevicePathProtocolGuid ## PRODUCES
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[Pcd]
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gArmPlatformTokenSpaceGuid.PcdPciBusMin
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gArmPlatformTokenSpaceGuid.PcdPciBusMax
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gArmPlatformTokenSpaceGuid.PcdPciIoBase
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gArmPlatformTokenSpaceGuid.PcdPciIoSize
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gArmPlatformTokenSpaceGuid.PcdPciIoTranslation
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gArmPlatformTokenSpaceGuid.PcdPciMmio32Base
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gArmPlatformTokenSpaceGuid.PcdPciMmio32Size
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[depex]
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gEfiMetronomeArchProtocolGuid
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