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remove additional space from comments and pass ICC/GCC44 build 

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10903 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
erictian 2010-09-30 08:44:59 +00:00
parent 16d5d16832
commit aca84419c4
5 changed files with 1112 additions and 1122 deletions
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21
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
View File

@ -501,7 +501,7 @@ AhciBuildCommandFis (
CmdFis->AhciCFisSecCount = AtaCommandBlock->AtaSectorCount;
CmdFis->AhciCFisSecCountExp = AtaCommandBlock->AtaSectorCountExp;
CmdFis->AhciCFisDevHead = AtaCommandBlock->AtaDeviceHead | 0xE0;
CmdFis->AhciCFisDevHead = (UINT8) (AtaCommandBlock->AtaDeviceHead | 0xE0);
}
/**
@ -527,6 +527,7 @@ AhciBuildCommandFis (
**/
EFI_STATUS
EFIAPI
AhciPioTransfer (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_AHCI_REGISTERS *AhciRegisters,
@ -1561,7 +1562,7 @@ AhciCreateTransferDescriptor (
// Get the number of command slots per port supported by this HBA.
//
MaxCommandSlotNumber = (UINT8) (((Capability & 0x1F00) >> 8) + 1);
Support64Bit = ((Capability & BIT31) != 0) ? TRUE : FALSE;
Support64Bit = (BOOLEAN) (((Capability & BIT31) != 0) ? TRUE : FALSE);
MaxReceiveFisSize = MaxPortNumber * sizeof (EFI_AHCI_RECEIVED_FIS);
Status = PciIo->AllocateBuffer (
@ -1588,7 +1589,7 @@ AhciCreateTransferDescriptor (
EfiPciIoOperationBusMasterCommonBuffer,
Buffer,
&Bytes,
&(EFI_PHYSICAL_ADDRESS)AhciRegisters->AhciRFisPciAddr,
(EFI_PHYSICAL_ADDRESS *) &AhciRegisters->AhciRFisPciAddr,
&AhciRegisters->MapRFis
);
@ -1600,7 +1601,7 @@ AhciCreateTransferDescriptor (
goto Error6;
}
if ((!Support64Bit) && ((EFI_PHYSICAL_ADDRESS)AhciRegisters->AhciRFisPciAddr > 0x100000000UL)) {
if ((!Support64Bit) && ((EFI_PHYSICAL_ADDRESS)(UINTN)AhciRegisters->AhciRFisPciAddr > 0x100000000ULL)) {
//
// The AHCI HBA doesn't support 64bit addressing, so should not get a >4G pci bus master address.
//
@ -1642,7 +1643,7 @@ AhciCreateTransferDescriptor (
EfiPciIoOperationBusMasterCommonBuffer,
Buffer,
&Bytes,
&(EFI_PHYSICAL_ADDRESS)AhciRegisters->AhciCmdListPciAddr,
(EFI_PHYSICAL_ADDRESS *)&AhciRegisters->AhciCmdListPciAddr,
&AhciRegisters->MapCmdList
);
@ -1654,7 +1655,7 @@ AhciCreateTransferDescriptor (
goto Error4;
}
if ((!Support64Bit) && ((EFI_PHYSICAL_ADDRESS)AhciRegisters->AhciCmdListPciAddr > 0x100000000UL)) {
if ((!Support64Bit) && ((EFI_PHYSICAL_ADDRESS)(UINTN)AhciRegisters->AhciCmdListPciAddr > 0x100000000ULL)) {
//
// The AHCI HBA doesn't support 64bit addressing, so should not get a >4G pci bus master address.
//
@ -1697,7 +1698,7 @@ AhciCreateTransferDescriptor (
EfiPciIoOperationBusMasterCommonBuffer,
Buffer,
&Bytes,
&(EFI_PHYSICAL_ADDRESS)AhciRegisters->AhciCommandTablePciAddr,
(EFI_PHYSICAL_ADDRESS *)&AhciRegisters->AhciCommandTablePciAddr,
&AhciRegisters->MapCommandTable
);
@ -1709,7 +1710,7 @@ AhciCreateTransferDescriptor (
goto Error2;
}
if ((!Support64Bit) && ((EFI_PHYSICAL_ADDRESS)AhciRegisters->AhciCommandTablePciAddr > 0x100000000UL)) {
if ((!Support64Bit) && ((EFI_PHYSICAL_ADDRESS)(UINTN)AhciRegisters->AhciCommandTablePciAddr > 0x100000000ULL)) {
//
// The AHCI HBA doesn't support 64bit addressing, so should not get a >4G pci bus master address.
//
@ -1819,7 +1820,7 @@ AhciModeInitialization (
// Get the number of command slots per port supported by this HBA.
//
MaxCommandSlotNumber = (UINT8) (((Capability & 0x1F00) >> 8) + 1);
Support64Bit = ((Capability & BIT31) != 0) ? TRUE : FALSE;
Support64Bit = (BOOLEAN) (((Capability & BIT31) != 0) ? TRUE : FALSE);
//
// Get the bit map of those ports exposed by this HBA.
@ -2006,5 +2007,3 @@ AhciModeInitialization (
return EFI_SUCCESS;
}

21
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.c
View File

@ -303,23 +303,8 @@ AtaAtapiPassThruSupported (
PciData.Hdr.ClassCode
);
if (EFI_ERROR (Status)) {
gBS->CloseProtocol (
Controller,
&gEfiPciIoProtocolGuid,
This->DriverBindingHandle,
Controller
);
return EFI_UNSUPPORTED;
}
//
// Close PciIo protocol as we have gotten the PciData.
//
gBS->CloseProtocol (
Controller,
&gEfiPciIoProtocolGuid,
This->DriverBindingHandle,
Controller
);
if (IS_PCI_IDE (&PciData) || IS_PCI_SATADPA (&PciData)) {
return EFI_SUCCESS;
@ -625,7 +610,7 @@ AtaAtapiPassThruStop (
);
PciIo->FreeBuffer (
PciIo,
EFI_SIZE_TO_PAGES (AhciRegisters->MaxCommandTableSize),
(UINTN) EFI_SIZE_TO_PAGES (AhciRegisters->MaxCommandTableSize),
AhciRegisters->AhciCommandTable
);
PciIo->Unmap (
@ -634,7 +619,7 @@ AtaAtapiPassThruStop (
);
PciIo->FreeBuffer (
PciIo,
EFI_SIZE_TO_PAGES (AhciRegisters->MaxCommandListSize),
(UINTN) EFI_SIZE_TO_PAGES (AhciRegisters->MaxCommandListSize),
AhciRegisters->AhciCmdList
);
PciIo->Unmap (
@ -643,7 +628,7 @@ AtaAtapiPassThruStop (
);
PciIo->FreeBuffer (
PciIo,
EFI_SIZE_TO_PAGES (AhciRegisters->MaxReceiveFisSize),
(UINTN) EFI_SIZE_TO_PAGES (AhciRegisters->MaxReceiveFisSize),
AhciRegisters->AhciRFis
);
}

7
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.h
View File

@ -500,6 +500,7 @@ EnumerateAttachedDevice (
**/
EFI_STATUS
EFIAPI
AtaPassThruPassThru (
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN UINT16 Port,
@ -540,6 +541,7 @@ AtaPassThruPassThru (
**/
EFI_STATUS
EFIAPI
AtaPassThruGetNextPort (
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN OUT UINT16 *Port
@ -588,6 +590,7 @@ AtaPassThruGetNextPort (
**/
EFI_STATUS
EFIAPI
AtaPassThruGetNextDevice (
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN UINT16 Port,
@ -627,6 +630,7 @@ AtaPassThruGetNextDevice (
**/
EFI_STATUS
EFIAPI
AtaPassThruBuildDevicePath (
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN UINT16 Port,
@ -671,6 +675,7 @@ AtaPassThruBuildDevicePath (
port number does not exist.
**/
EFI_STATUS
EFIAPI
AtaPassThruGetDevice (
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
@ -703,6 +708,7 @@ AtaPassThruGetDevice (
**/
EFI_STATUS
EFIAPI
AtaPassThruResetPort (
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN UINT16 Port
@ -740,6 +746,7 @@ AtaPassThruResetPort (
**/
EFI_STATUS
EFIAPI
AtaPassThruResetDevice (
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN UINT16 Port,

19
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c
View File

@ -960,7 +960,7 @@ GetIdeRegisterIoAddr (
IdeRegisters[EfiIdeSecondary].Head = (UINT16) (CommandBlockBaseAddr + 0x06);
IdeRegisters[EfiIdeSecondary].CmdOrStatus = (UINT16) (CommandBlockBaseAddr + 0x07);
IdeRegisters[EfiIdeSecondary].AltOrDev = ControlBlockBaseAddr;
IdeRegisters[EfiIdeSecondary].BusMasterBaseAddr = BusMasterBaseAddr + 0x8;
IdeRegisters[EfiIdeSecondary].BusMasterBaseAddr = (UINT16) (BusMasterBaseAddr + 0x8);
return EFI_SUCCESS;
}
@ -1411,7 +1411,7 @@ AtaUdmaInOut (
AllocateAnyPages,
EfiBootServicesData,
PageCount,
&PrdBaseAddr,
(VOID **)&PrdBaseAddr,
0
);
if (EFI_ERROR (Status)) {
@ -1503,9 +1503,9 @@ AtaUdmaInOut (
DeviceControl = 0;
IdeWritePortB (PciIo, IdeRegisters->AltOrDev, DeviceControl);
IoPortForBmic = IdeRegisters->BusMasterBaseAddr + BMIC_OFFSET;
IoPortForBmis = IdeRegisters->BusMasterBaseAddr + BMIS_OFFSET;
IoPortForBmid = IdeRegisters->BusMasterBaseAddr + BMID_OFFSET;
IoPortForBmic = (UINT16) (IdeRegisters->BusMasterBaseAddr + BMIC_OFFSET);
IoPortForBmis = (UINT16) (IdeRegisters->BusMasterBaseAddr + BMIS_OFFSET);
IoPortForBmid = (UINT16) (IdeRegisters->BusMasterBaseAddr + BMID_OFFSET);
//
// Read BMIS register and clear ERROR and INTR bit
@ -1715,8 +1715,7 @@ AtaPacketReadWrite (
//
Status = DRQReady2 (PciIo, IdeRegisters, Timeout);
if (EFI_ERROR (Status)) {
CheckStatusRegister (PciIo, IdeRegisters);
return EFI_DEVICE_ERROR;
return CheckStatusRegister (PciIo, IdeRegisters);
}
//
@ -1890,7 +1889,7 @@ AtaPacketCommandExecute (
//
AtaCommandBlock.AtaCylinderLow = (UINT8) (ATAPI_MAX_BYTE_COUNT & 0x00ff);
AtaCommandBlock.AtaCylinderHigh = (UINT8) (ATAPI_MAX_BYTE_COUNT >> 8);
AtaCommandBlock.AtaDeviceHead = Device << 0x4;
AtaCommandBlock.AtaDeviceHead = (UINT8) (Device << 0x4);
AtaCommandBlock.AtaCommand = ATA_CMD_PACKET;
IdeWritePortB (PciIo, IdeRegisters->Head, (UINT8)(0xe0 | (Device << 0x4)));
@ -2247,7 +2246,7 @@ DetectAndConfigIdeDevice (
UINT8 LBAMidReg;
UINT8 LBAHighReg;
EFI_ATA_DEVICE_TYPE DeviceType;
EFI_IDE_DEVICE IdeDevice;
UINT8 IdeDevice;
EFI_IDE_REGISTERS *IdeRegisters;
EFI_IDENTIFY_DATA Buffer;
@ -2409,7 +2408,7 @@ DetectAndConfigIdeDevice (
// Init driver parameters
//
DriveParameters.Sector = (UINT8) ((ATA5_IDENTIFY_DATA *)(&Buffer.AtaData))->sectors_per_track;
DriveParameters.Heads = (UINT8) ((ATA5_IDENTIFY_DATA *)(&Buffer.AtaData))->heads - 1;
DriveParameters.Heads = (UINT8) (((ATA5_IDENTIFY_DATA *)(&Buffer.AtaData))->heads - 1);
DriveParameters.MultipleSector = (UINT8) ((ATA5_IDENTIFY_DATA *)(&Buffer.AtaData))->multi_sector_cmd_max_sct_cnt;
Status = SetDriveParameters (Instance, IdeChannel, IdeDevice, &DriveParameters, NULL);