tyler.durden
/
audk
mirror of https://github.com/acidanthera/audk.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Add description for 64-byte FIFO enable bit for PcdSerialFifoControl. 

Update SerialPortInitializer() to properly preserve BIT5 in FCR instead of BIT4.


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11404 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
mdkinney 2011-03-16 02:58:51 +00:00
parent 831ff057d7
commit acaa2726fb
2 changed files with 4 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c
View File

@ -158,7 +158,7 @@ SerialPortInitialize (
// Enable and reset FIFOs // Enable and reset FIFOs
// Strip reserved bits from PcdSerialFifoControl // Strip reserved bits from PcdSerialFifoControl
// //
SerialPortWriteRegister (R_UART_FCR, (UINT8)(PcdGet8 (PcdSerialFifoControl) & 0x17)); SerialPortWriteRegister (R_UART_FCR, (UINT8)(PcdGet8 (PcdSerialFifoControl) & 0x27));
// //
// Put Modem Control Register(MCR) into its reset state of 0x00. // Put Modem Control Register(MCR) into its reset state of 0x00.

4
MdeModulePkg/MdeModulePkg.dec
View File

@ -444,7 +444,9 @@
# BIT0 - FIFO Enable. 0 = Disable FIFOs. 1 = Enable FIFOs. # BIT0 - FIFO Enable. 0 = Disable FIFOs. 1 = Enable FIFOs.
# BIT1 - Clear receive FIFO. 1 = Clear FIFO. # BIT1 - Clear receive FIFO. 1 = Clear FIFO.
# BIT2 - Clear transmit FIFO. 1 = Clear FIFO. # BIT2 - Clear transmit FIFO. 1 = Clear FIFO.
# BIT7..BIT3 - Reserved. Must be 0. # BIT4..BIT3 - Reserved. Must be 0.
# BIT5 - Enable 64-byte FIFO. 0 = Disable 64-byte FIFO. 1 = Enable 64-byte FIFO
# BIT7..BIT6 - Reserved. Must be 0.
# #
# Default is to enable and clear all FIFOs. # Default is to enable and clear all FIFOs.
# #