mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/MpInitLib: Implementation of MpInitLibGetProcessorInfo()
v5:
1. Remove (-1) and use the clean code to calculate the Location->Thread
and Location->Core.
v4:
1. Update HealthData type from UINT32 to EFI_HEALTH_FLAGS
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Michael Kinney <michael.d.kinney@intel.com>
This commit is contained in:
Jeff Fan
parent
809213a679
commit
ad52f25edf
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@ -57,6 +57,132 @@ IsBspExecuteDisableEnabled (
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return Enabled;
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return Enabled;
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}
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}
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/**
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Get CPU Package/Core/Thread location information.
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@param[in] InitialApicId CPU APIC ID
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@param[out] Location Pointer to CPU location information
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**/
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VOID
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ExtractProcessorLocation (
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IN UINT32 InitialApicId,
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OUT EFI_CPU_PHYSICAL_LOCATION *Location
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)
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{
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BOOLEAN TopologyLeafSupported;
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UINTN ThreadBits;
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UINTN CoreBits;
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CPUID_VERSION_INFO_EBX VersionInfoEbx;
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CPUID_VERSION_INFO_EDX VersionInfoEdx;
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CPUID_CACHE_PARAMS_EAX CacheParamsEax;
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CPUID_EXTENDED_TOPOLOGY_EAX ExtendedTopologyEax;
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CPUID_EXTENDED_TOPOLOGY_EBX ExtendedTopologyEbx;
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CPUID_EXTENDED_TOPOLOGY_ECX ExtendedTopologyEcx;
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UINT32 MaxCpuIdIndex;
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UINT32 SubIndex;
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UINTN LevelType;
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UINT32 MaxLogicProcessorsPerPackage;
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UINT32 MaxCoresPerPackage;
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//
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// Check if the processor is capable of supporting more than one logical processor.
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//
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AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &VersionInfoEdx.Uint32);
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if (VersionInfoEdx.Bits.HTT == 0) {
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Location->Thread = 0;
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Location->Core = 0;
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Location->Package = 0;
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return;
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}
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ThreadBits = 0;
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CoreBits = 0;
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//
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// Assume three-level mapping of APIC ID: Package:Core:SMT.
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//
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TopologyLeafSupported = FALSE;
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//
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// Get the max index of basic CPUID
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//
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AsmCpuid (CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL);
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//
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// If the extended topology enumeration leaf is available, it
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// is the preferred mechanism for enumerating topology.
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//
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if (MaxCpuIdIndex >= CPUID_EXTENDED_TOPOLOGY) {
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AsmCpuidEx (
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CPUID_EXTENDED_TOPOLOGY,
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0,
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&ExtendedTopologyEax.Uint32,
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&ExtendedTopologyEbx.Uint32,
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&ExtendedTopologyEcx.Uint32,
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NULL
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);
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//
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// If CPUID.(EAX=0BH, ECX=0H):EBX returns zero and maximum input value for
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// basic CPUID information is greater than 0BH, then CPUID.0BH leaf is not
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// supported on that processor.
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//
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if (ExtendedTopologyEbx.Uint32 != 0) {
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TopologyLeafSupported = TRUE;
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//
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// Sub-leaf index 0 (ECX= 0 as input) provides enumeration parameters to extract
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// the SMT sub-field of x2APIC ID.
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//
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LevelType = ExtendedTopologyEcx.Bits.LevelType;
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ASSERT (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT);
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ThreadBits = ExtendedTopologyEax.Bits.ApicIdShift;
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//
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// Software must not assume any "level type" encoding
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// value to be related to any sub-leaf index, except sub-leaf 0.
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//
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SubIndex = 1;
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do {
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AsmCpuidEx (
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CPUID_EXTENDED_TOPOLOGY,
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SubIndex,
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&ExtendedTopologyEax.Uint32,
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NULL,
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&ExtendedTopologyEcx.Uint32,
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NULL
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);
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LevelType = ExtendedTopologyEcx.Bits.LevelType;
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if (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_CORE) {
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CoreBits = ExtendedTopologyEax.Bits.ApicIdShift - ThreadBits;
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break;
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}
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SubIndex++;
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} while (LevelType != CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID);
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}
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}
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if (!TopologyLeafSupported) {
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AsmCpuid (CPUID_VERSION_INFO, NULL, &VersionInfoEbx.Uint32, NULL, NULL);
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MaxLogicProcessorsPerPackage = VersionInfoEbx.Bits.MaximumAddressableIdsForLogicalProcessors;
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if (MaxCpuIdIndex >= CPUID_CACHE_PARAMS) {
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AsmCpuidEx (CPUID_CACHE_PARAMS, 0, &CacheParamsEax.Uint32, NULL, NULL, NULL);
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MaxCoresPerPackage = CacheParamsEax.Bits.MaximumAddressableIdsForLogicalProcessors + 1;
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} else {
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//
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// Must be a single-core processor.
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//
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MaxCoresPerPackage = 1;
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}
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ThreadBits = (UINTN) (HighBitSet32 (MaxLogicProcessorsPerPackage / MaxCoresPerPackage - 1) + 1);
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CoreBits = (UINTN) (HighBitSet32 (MaxCoresPerPackage - 1) + 1);
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}
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Location->Thread = InitialApicId & ((1 << ThreadBits) - 1);
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Location->Core = (InitialApicId >> ThreadBits) & ((1 << CoreBits) - 1);
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Location->Package = (InitialApicId >> (ThreadBits + CoreBits));
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}
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/**
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/**
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Get the Application Processors state.
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Get the Application Processors state.
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@ -930,8 +1056,54 @@ MpInitLibGetProcessorInfo (
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OUT EFI_HEALTH_FLAGS *HealthData OPTIONAL
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OUT EFI_HEALTH_FLAGS *HealthData OPTIONAL
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)
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)
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{
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{
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return EFI_UNSUPPORTED;
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CPU_MP_DATA *CpuMpData;
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UINTN CallerNumber;
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CpuMpData = GetCpuMpData ();
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//
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// Check whether caller processor is BSP
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//
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MpInitLibWhoAmI (&CallerNumber);
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if (CallerNumber != CpuMpData->BspNumber) {
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return EFI_DEVICE_ERROR;
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}
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if (ProcessorInfoBuffer == NULL) {
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return EFI_INVALID_PARAMETER;
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}
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if (ProcessorNumber >= CpuMpData->CpuCount) {
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return EFI_NOT_FOUND;
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}
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ProcessorInfoBuffer->ProcessorId = (UINT64) CpuMpData->CpuData[ProcessorNumber].ApicId;
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ProcessorInfoBuffer->StatusFlag = 0;
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if (ProcessorNumber == CpuMpData->BspNumber) {
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ProcessorInfoBuffer->StatusFlag |= PROCESSOR_AS_BSP_BIT;
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}
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if (CpuMpData->CpuData[ProcessorNumber].CpuHealthy) {
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ProcessorInfoBuffer->StatusFlag |= PROCESSOR_HEALTH_STATUS_BIT;
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}
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if (GetApState (&CpuMpData->CpuData[ProcessorNumber]) == CpuStateDisabled) {
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ProcessorInfoBuffer->StatusFlag &= ~PROCESSOR_ENABLED_BIT;
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} else {
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ProcessorInfoBuffer->StatusFlag |= PROCESSOR_ENABLED_BIT;
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}
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//
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// Get processor location information
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//
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ExtractProcessorLocation (CpuMpData->CpuData[ProcessorNumber].ApicId, &ProcessorInfoBuffer->Location);
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if (HealthData != NULL) {
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HealthData->Uint32 = CpuMpData->CpuData[ProcessorNumber].Health;
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}
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return EFI_SUCCESS;
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}
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}
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/**
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/**
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This return the handle number for the calling processor. This service may be
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This return the handle number for the calling processor. This service may be
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called from the BSP and APs.
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called from the BSP and APs.
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