Removed duplicate PalCallStatic functions in different libraries. Moved ReadItc and InvalidateInstructionCacheRange to the BaseLib so other libs don't need .s files.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@1810 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
ajfish 2006-10-22 03:06:05 +00:00
parent cd4903c497
commit b077fb7492
2 changed files with 0 additions and 154 deletions

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//++
// Copyright (c) 2006, Intel Corporation
// All rights reserved. This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
// Module Name:
//
// Cpu.s
//
// Abstract:
//
//
// Revision History:
//
//--
.file "Cpu.s"
.radix D
.section .text, "ax", "progbits"
.align 32
.section .pdata, "a", "progbits"
.align 4
.section .xdata, "a", "progbits"
.align 8
.section .data, "wa", "progbits"
.align 16
.section .rdata, "a", "progbits"
.align 16
.section .bss, "wa", "nobits"
.align 16
.section .tls$, "was", "progbits"
.align 16
.section .sdata, "was", "progbits"
.align 16
.section .sbss, "was", "nobits"
.align 16
.section .srdata, "as", "progbits"
.align 16
.section .rdata, "a", "progbits"
.align 16
.section .rtcode, "ax", "progbits"
.align 32
.type InvalidateInstructionCacheRange# ,@function
.globl InvalidateInstructionCacheRange#
// Function compile flags: /Ogsy
.section .rtcode
// Begin code for function: InvalidateInstructionCacheRange:
.proc InvalidateInstructionCacheRange#
.align 32
InvalidateInstructionCacheRange:
// File e:\tmp\pioflush.c
{ .mii //R-Addr: 0X00
alloc r3=2, 0, 0, 0 //11, 00000002H
cmp4.leu p0,p6=32, r33;; //15, 00000020H
(p6) mov r33=32;; //16, 00000020H
}
{ .mii //R-Addr: 0X010
nop.m 0
zxt4 r29=r33;; //21
dep.z r30=r29, 0, 5;; //21, 00000005H
}
{ .mii //R-Addr: 0X020
cmp4.eq p0,p7=r0, r30 //21
shr.u r28=r29, 5;; //19, 00000005H
(p7) adds r28=1, r28;; //22, 00000001H
}
{ .mii //R-Addr: 0X030
nop.m 0
shl r27=r28, 5;; //25, 00000005H
zxt4 r26=r27;; //25
}
{ .mfb //R-Addr: 0X040
add r31=r26, r32 //25
nop.f 0
nop.b 0
}
$L143:
{ .mii //R-Addr: 0X050
fc r32 //27
adds r32=32, r32;; //28, 00000020H
cmp.ltu p14,p15=r32, r31 //29
}
{ .mfb //R-Addr: 0X060
nop.m 0
nop.f 0
(p14) br.cond.dptk.few $L143#;; //29, 880000/120000
}
{ .mmi
sync.i;;
srlz.i
nop.i 0;;
}
{ .mfb //R-Addr: 0X070
nop.m 0
nop.f 0
br.ret.sptk.few b0;; //31
}
// End code for function:
.endp InvalidateInstructionCacheRange#
// END

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/// @file
/// Contains an implementation of CallPalProcStatic on Itanium-based
/// architecture.
///
/// Copyright (c) 2006, Intel Corporation
/// All rights reserved. This program and the accompanying materials
/// are licensed and made available under the terms and conditions of the BSD License
/// which accompanies this distribution. The full text of the license may be found at
/// http://opensource.org/licenses/bsd-license.php
///
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Module Name: PalCallStatic.s
///
///
.auto
.text
.proc PalCallStatic
.type PalCallStatic, @function
.regstk 5, 0, 0, 0
PalCallStatic::
cmp.eq p15 = in0, r0
mov r31 = in4
mov r8 = ip
(p15) mov in0 = ar.k5
add r8 = (_PalProcReturn - PalCallStatic), r8
mov r30 = in3
mov in4 = psr
mov in3 = b0
mov b7 = in0
rsm 1 << 14 // Disable interrupts
mov r29 = in2
mov r28 = in1
mov b0 = r8
br.cond.sptk.many b7
_PalProcReturn:
mov psr.l = in4
mov b0 = in3
br.ret.sptk.many b0
.endp PalCallStatic