mirror of https://github.com/acidanthera/audk.git
CorebootModulePkg/BaseSerialPortLib16550: Remove white-space
Remove trailing white space. Change-Id: I73c3a3e1e55eec20b09443de1966573c97fa74f8 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
This commit is contained in:
Leahy, Leroy P
Prince Agyeman
parent
12460e227f
commit
b08993bd13
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@ -62,11 +62,11 @@ typedef struct {
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} PCI_UART_DEVICE_INFO;
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/**
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Read an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is read from
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Read an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is read from
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MMIO space. If PcdSerialUseMmio is FALSE, then the value is read from I/O space. The
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parameter Offset is added to the base address of the 16550 registers that is specified
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by PcdSerialRegisterBase.
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parameter Offset is added to the base address of the 16550 registers that is specified
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by PcdSerialRegisterBase.
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@param Base The base address register of UART device.
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@param Offset The offset of the 16550 register to read.
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@ -89,9 +89,9 @@ SerialPortReadRegister (
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/**
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Write an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is written to
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MMIO space. If PcdSerialUseMmio is FALSE, then the value is written to I/O space. The
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parameter Offset is added to the base address of the 16550 registers that is specified
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by PcdSerialRegisterBase.
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parameter Offset is added to the base address of the 16550 registers that is specified
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by PcdSerialRegisterBase.
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@param Base The base address register of UART device.
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@param Offset The offset of the 16550 register to write.
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@param Value The value to write to the 16550 register specified by Offset.
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@ -114,11 +114,11 @@ SerialPortWriteRegister (
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}
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/**
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Update the value of an 16-bit PCI configuration register in a PCI device. If the
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PCI Configuration register specified by PciAddress is already programmed with a
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non-zero value, then return the current value. Otherwise update the PCI configuration
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Update the value of an 16-bit PCI configuration register in a PCI device. If the
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PCI Configuration register specified by PciAddress is already programmed with a
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non-zero value, then return the current value. Otherwise update the PCI configuration
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register specified by PciAddress with the value specified by Value and return the
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value programmed into the PCI configuration register. All values must be masked
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value programmed into the PCI configuration register. All values must be masked
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using the bitmask specified by Mask.
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@param PciAddress PCI Library address of the PCI Configuration register to update.
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@ -134,7 +134,7 @@ SerialPortLibUpdatePciRegister16 (
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)
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{
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UINT16 CurrentValue;
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CurrentValue = PciRead16 (PciAddress) & Mask;
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if (CurrentValue != 0) {
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return CurrentValue;
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@ -143,11 +143,11 @@ SerialPortLibUpdatePciRegister16 (
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}
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/**
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Update the value of an 32-bit PCI configuration register in a PCI device. If the
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PCI Configuration register specified by PciAddress is already programmed with a
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non-zero value, then return the current value. Otherwise update the PCI configuration
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Update the value of an 32-bit PCI configuration register in a PCI device. If the
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PCI Configuration register specified by PciAddress is already programmed with a
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non-zero value, then return the current value. Otherwise update the PCI configuration
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register specified by PciAddress with the value specified by Value and return the
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value programmed into the PCI configuration register. All values must be masked
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value programmed into the PCI configuration register. All values must be masked
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using the bitmask specified by Mask.
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@param PciAddress PCI Library address of the PCI Configuration register to update.
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@ -165,7 +165,7 @@ SerialPortLibUpdatePciRegister32 (
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)
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{
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UINT32 CurrentValue;
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CurrentValue = PciRead32 (PciAddress) & Mask;
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if (CurrentValue != 0) {
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return CurrentValue;
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@ -174,11 +174,11 @@ SerialPortLibUpdatePciRegister32 (
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}
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/**
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Retrieve the I/O or MMIO base address register for the PCI UART device.
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This function assumes Root Bus Numer is Zero, and enables I/O and MMIO in PCI UART
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Device if they are not already enabled.
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Retrieve the I/O or MMIO base address register for the PCI UART device.
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This function assumes Root Bus Numer is Zero, and enables I/O and MMIO in PCI UART
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Device if they are not already enabled.
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@return The base address register of the UART device.
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**/
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@ -207,10 +207,10 @@ GetSerialRegisterBase (
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// Get PCI Device Info
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//
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DeviceInfo = (PCI_UART_DEVICE_INFO *) PcdGetPtr (PcdSerialPciDeviceInfo);
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//
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// If PCI Device Info is empty, then assume fixed address UART and return PcdSerialRegisterBase
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//
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//
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if (DeviceInfo->Device == 0xff) {
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return (UINTN)PcdGet64 (PcdSerialRegisterBase);
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}
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@ -222,17 +222,17 @@ GetSerialRegisterBase (
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ParentMemoryLimit = 0xfff00000 >> 16;
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ParentIoBase = 0 >> 12;
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ParentIoLimit = 0xf000 >> 12;
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//
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// Enable I/O and MMIO in PCI Bridge
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// Assume Root Bus Numer is Zero.
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// Assume Root Bus Numer is Zero.
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//
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for (BusNumber = 0; (DeviceInfo + 1)->Device != 0xff; DeviceInfo++) {
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//
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// Compute PCI Lib Address to PCI to PCI Bridge
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//
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PciLibAddress = PCI_LIB_ADDRESS (BusNumber, DeviceInfo->Device, DeviceInfo->Function, 0);
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//
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// Retrieve and verify the bus numbers in the PCI to PCI Bridge
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//
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@ -255,10 +255,10 @@ GetSerialRegisterBase (
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if (MemoryLimit < MemoryBase) {
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return 0;
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}
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//
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// If PCI Bridge MMIO window is not in the address range decoded by the parent PCI Bridge, then return 0
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//
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//
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if (MemoryBase < ParentMemoryBase || MemoryBase > ParentMemoryLimit || MemoryLimit > ParentMemoryLimit) {
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return 0;
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}
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@ -277,17 +277,17 @@ GetSerialRegisterBase (
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} else {
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IoBase = (PciRead16 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoBaseUpper16)) << 4) | (IoBase >> 4);
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}
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//
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// If PCI Bridge I/O window is disabled, then return 0
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//
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if (IoLimit < IoBase) {
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return 0;
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}
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//
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// If PCI Bridge I/O window is not in the address range decoded by the parent PCI Bridge, then return 0
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//
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//
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if (IoBase < ParentIoBase || IoBase > ParentIoLimit || IoLimit > ParentIoLimit) {
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return 0;
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}
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@ -300,7 +300,7 @@ GetSerialRegisterBase (
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// Compute PCI Lib Address to PCI UART
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//
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PciLibAddress = PCI_LIB_ADDRESS (BusNumber, DeviceInfo->Device, DeviceInfo->Function, 0);
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//
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// Find the first IO or MMIO BAR
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//
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@ -333,16 +333,16 @@ GetSerialRegisterBase (
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//
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// Program UART BAR
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//
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//
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SerialRegisterBase = SerialPortLibUpdatePciRegister32 (
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PciLibAddress + PCI_BASE_ADDRESSREG_OFFSET + BarIndex * 4,
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(UINT32)PcdGet64 (PcdSerialRegisterBase),
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(UINT32)PcdGet64 (PcdSerialRegisterBase),
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RegisterBaseMask
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);
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//
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// Verify that the UART BAR is in the address range decoded by the parent PCI Bridge
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//
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//
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if (PcdGetBool (PcdSerialUseMmio)) {
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if (((SerialRegisterBase >> 16) & 0xfff0) < ParentMemoryBase || ((SerialRegisterBase >> 16) & 0xfff0) > ParentMemoryLimit) {
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return 0;
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@ -352,7 +352,7 @@ GetSerialRegisterBase (
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return 0;
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}
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}
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//
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// Enable I/O and MMIO in PCI UART Device if they are not already enabled
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//
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@ -373,7 +373,7 @@ GetSerialRegisterBase (
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SerialPortWriteRegister (SerialRegisterBase, R_UART_FCR, (UINT8)(PcdGet8 (PcdSerialFifoControl) & (B_UART_FCR_FIFOE | B_UART_FCR_FIFO64)));
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}
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}
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//
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// Get PCI Device Info
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//
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@ -381,22 +381,22 @@ GetSerialRegisterBase (
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//
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// Enable I/O or MMIO in PCI Bridge
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// Assume Root Bus Numer is Zero.
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// Assume Root Bus Numer is Zero.
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//
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for (BusNumber = 0; (DeviceInfo + 1)->Device != 0xff; DeviceInfo++) {
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//
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// Compute PCI Lib Address to PCI to PCI Bridge
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//
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PciLibAddress = PCI_LIB_ADDRESS (BusNumber, DeviceInfo->Device, DeviceInfo->Function, 0);
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//
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// Enable the I/O or MMIO decode windows in the PCI to PCI Bridge
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//
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PciOr16 (
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PciLibAddress + PCI_COMMAND_OFFSET,
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PciLibAddress + PCI_COMMAND_OFFSET,
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PcdGetBool (PcdSerialUseMmio) ? EFI_PCI_COMMAND_MEMORY_SPACE : EFI_PCI_COMMAND_IO_SPACE
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);
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//
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// Force D0 state if a Power Management and Status Register is specified
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//
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@ -405,10 +405,10 @@ GetSerialRegisterBase (
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PciAnd16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister, (UINT16)~(BIT0 | BIT1));
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}
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}
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BusNumber = PciRead8 (PciLibAddress + PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET);
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}
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return SerialRegisterBase;
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}
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@ -442,7 +442,7 @@ SerialPortWritable (
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return (BOOLEAN) ((SerialPortReadRegister (SerialRegisterBase, R_UART_MSR) & (B_UART_MSR_DSR | B_UART_MSR_CTS)) == (B_UART_MSR_DSR | B_UART_MSR_CTS));
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} else {
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//
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// Wait for both DSR and CTS to be set OR for DSR to be clear.
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// Wait for both DSR and CTS to be set OR for DSR to be clear.
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// DSR is set if a cable is connected.
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// CTS is set if it is ok to transmit data
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//
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@ -462,11 +462,11 @@ SerialPortWritable (
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/**
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Initialize the serial device hardware.
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If no initialization is required, then return RETURN_SUCCESS.
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If the serial device was successfully initialized, then return RETURN_SUCCESS.
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If the serial device could not be initialized, then return RETURN_DEVICE_ERROR.
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@retval RETURN_SUCCESS The serial device was initialized.
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@retval RETURN_DEVICE_ERROR The serial device could not be initialized.
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@ -480,7 +480,7 @@ SerialPortInitialize (
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RETURN_STATUS Status;
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UINTN SerialRegisterBase;
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UINT32 Divisor;
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UINT32 CurrentDivisor;
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UINT32 CurrentDivisor;
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BOOLEAN Initialized;
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//
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@ -532,7 +532,7 @@ SerialPortInitialize (
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// Verify that both the transmit FIFO and the shift register are empty.
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//
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while ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) != (B_UART_LSR_TEMT | B_UART_LSR_TXRDY));
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//
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// Configure baud rate
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//
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@ -555,20 +555,20 @@ SerialPortInitialize (
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//
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// Put Modem Control Register(MCR) into its reset state of 0x00.
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//
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//
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SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, 0x00);
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return RETURN_SUCCESS;
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}
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/**
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Write data from buffer to serial device.
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Write data from buffer to serial device.
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Writes NumberOfBytes data bytes from Buffer to the serial device.
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Writes NumberOfBytes data bytes from Buffer to the serial device.
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The number of bytes actually written to the serial device is returned.
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If the return value is less than NumberOfBytes, then the write operation failed.
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If Buffer is NULL, then ASSERT().
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If Buffer is NULL, then ASSERT().
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If NumberOfBytes is zero, then return 0.
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@ -576,7 +576,7 @@ SerialPortInitialize (
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@param NumberOfBytes Number of bytes to written to the serial device.
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@retval 0 NumberOfBytes is 0.
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@retval >0 The number of bytes written to the serial device.
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@retval >0 The number of bytes written to the serial device.
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If this value is less than NumberOfBytes, then the write operation failed.
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**/
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@ -600,7 +600,7 @@ SerialPortWrite (
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if (SerialRegisterBase ==0) {
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return 0;
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}
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if (NumberOfBytes == 0) {
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//
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// Flush the hardware
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@ -663,7 +663,7 @@ SerialPortWrite (
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@param NumberOfBytes Number of bytes to read from the serial device.
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@retval 0 NumberOfBytes is 0.
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@retval >0 The number of bytes read from the serial device.
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@retval >0 The number of bytes read from the serial device.
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If this value is less than NumberOfBytes, then the read operation failed.
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**/
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@ -688,7 +688,7 @@ SerialPortRead (
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}
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Mcr = (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_MCR) & ~B_UART_MCR_RTS);
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for (Result = 0; NumberOfBytes-- != 0; Result++, Buffer++) {
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//
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// Wait for the serial port to have some data.
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@ -707,13 +707,13 @@ SerialPortRead (
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//
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SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, Mcr);
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}
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//
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// Read byte from the receive buffer.
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//
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*Buffer = SerialPortReadRegister (SerialRegisterBase, R_UART_RXBUF);
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}
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return Result;
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}
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@ -736,7 +736,7 @@ SerialPortPoll (
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)
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{
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UINTN SerialRegisterBase;
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SerialRegisterBase = GetSerialRegisterBase ();
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if (SerialRegisterBase ==0) {
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return FALSE;
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@ -753,15 +753,15 @@ SerialPortPoll (
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SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_MCR) & ~B_UART_MCR_RTS));
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}
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return TRUE;
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}
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}
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if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {
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//
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// Set RTS to let the peer send some data
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//
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SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_MCR) | B_UART_MCR_RTS));
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}
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return FALSE;
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}
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@ -33,7 +33,7 @@
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[Sources]
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BaseSerialPortLib16550.c
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[Pcd]
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## CONSUMES
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl ## CONSUMES
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