mirror of https://github.com/acidanthera/audk.git
MdeModulePkg/DxeIplPeim: Support GHCB pages when creating page tables
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 GHCB pages must be mapped as shared pages, so modify the process of creating identity mapped pagetable entries so that GHCB entries are created without the encryption bit set. The GHCB range consists of two pages per CPU, the first being the GHCB and the second being a per-CPU variable page. Only the GHCB page is mapped as shared. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Liming Gao <liming.gao@intel.com> Acked-by: Hao A Wu <hao.a.wu@intel.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
This commit is contained in:
parent
1c0eb91503
commit
b098f5e9e9
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@ -115,6 +115,8 @@
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gEfiMdeModulePkgTokenSpaceGuid.PcdHeapGuardPropertyMask ## CONSUMES
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gEfiMdeModulePkgTokenSpaceGuid.PcdHeapGuardPropertyMask ## CONSUMES
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gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard ## CONSUMES
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gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard ## CONSUMES
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gEfiMdeModulePkgTokenSpaceGuid.PcdUse5LevelPageTable ## SOMETIMES_CONSUMES
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gEfiMdeModulePkgTokenSpaceGuid.PcdUse5LevelPageTable ## SOMETIMES_CONSUMES
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gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase ## CONSUMES
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gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbSize ## CONSUMES
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[Pcd.IA32,Pcd.X64,Pcd.ARM,Pcd.AARCH64]
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[Pcd.IA32,Pcd.X64,Pcd.ARM,Pcd.AARCH64]
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gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack ## SOMETIMES_CONSUMES
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gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack ## SOMETIMES_CONSUMES
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@ -123,7 +123,7 @@ Create4GPageTablesIa32Pae (
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//
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//
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// Need to split this 2M page that covers stack range.
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// Need to split this 2M page that covers stack range.
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//
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//
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Split2MPageTo4K (PhysicalAddress, (UINT64 *) PageDirectoryEntry, StackBase, StackSize);
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Split2MPageTo4K (PhysicalAddress, (UINT64 *) PageDirectoryEntry, StackBase, StackSize, 0, 0);
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} else {
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} else {
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//
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//
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// Fill in the Page Directory entries
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// Fill in the Page Directory entries
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@ -282,7 +282,7 @@ HandOffToDxeCore (
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//
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//
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// Create page table and save PageMapLevel4 to CR3
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// Create page table and save PageMapLevel4 to CR3
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//
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//
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PageTables = CreateIdentityMappingPageTables (BaseOfStack, STACK_SIZE);
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PageTables = CreateIdentityMappingPageTables (BaseOfStack, STACK_SIZE, 0, 0);
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//
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//
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// End of PEI phase signal
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// End of PEI phase signal
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@ -35,6 +35,8 @@ HandOffToDxeCore (
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UINT32 Index;
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UINT32 Index;
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EFI_VECTOR_HANDOFF_INFO *VectorInfo;
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EFI_VECTOR_HANDOFF_INFO *VectorInfo;
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EFI_PEI_VECTOR_HANDOFF_INFO_PPI *VectorHandoffInfoPpi;
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EFI_PEI_VECTOR_HANDOFF_INFO_PPI *VectorHandoffInfoPpi;
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VOID *GhcbBase;
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UINTN GhcbSize;
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//
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//
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// Clear page 0 and mark it as allocated if NULL pointer detection is enabled.
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// Clear page 0 and mark it as allocated if NULL pointer detection is enabled.
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@ -81,12 +83,19 @@ HandOffToDxeCore (
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TopOfStack = (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);
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TopOfStack = (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);
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TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
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TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
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//
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// Get the address and size of the GHCB pages
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//
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GhcbBase = (VOID *) PcdGet64 (PcdGhcbBase);
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GhcbSize = PcdGet64 (PcdGhcbSize);
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PageTables = 0;
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PageTables = 0;
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if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {
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if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {
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//
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//
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// Create page table and save PageMapLevel4 to CR3
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// Create page table and save PageMapLevel4 to CR3
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//
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//
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PageTables = CreateIdentityMappingPageTables ((EFI_PHYSICAL_ADDRESS) (UINTN) BaseOfStack, STACK_SIZE);
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PageTables = CreateIdentityMappingPageTables ((EFI_PHYSICAL_ADDRESS) (UINTN) BaseOfStack, STACK_SIZE,
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(EFI_PHYSICAL_ADDRESS) (UINTN) GhcbBase, GhcbSize);
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} else {
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} else {
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//
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//
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// Set NX for stack feature also require PcdDxeIplBuildPageTables be TRUE
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// Set NX for stack feature also require PcdDxeIplBuildPageTables be TRUE
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@ -181,6 +181,8 @@ EnableExecuteDisableBit (
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@param Size Size of the given physical memory.
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@param Size Size of the given physical memory.
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@param StackBase Base address of stack.
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@param StackBase Base address of stack.
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@param StackSize Size of stack.
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@param StackSize Size of stack.
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@param GhcbBase Base address of GHCB pages.
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@param GhcbSize Size of GHCB area.
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@retval TRUE Page table should be split.
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@retval TRUE Page table should be split.
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@retval FALSE Page table should not be split.
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@retval FALSE Page table should not be split.
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@ -190,7 +192,9 @@ ToSplitPageTable (
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IN EFI_PHYSICAL_ADDRESS Address,
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IN EFI_PHYSICAL_ADDRESS Address,
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IN UINTN Size,
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IN UINTN Size,
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IN EFI_PHYSICAL_ADDRESS StackBase,
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IN EFI_PHYSICAL_ADDRESS StackBase,
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IN UINTN StackSize
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IN UINTN StackSize,
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IN EFI_PHYSICAL_ADDRESS GhcbBase,
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IN UINTN GhcbSize
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)
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)
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{
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{
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if (IsNullDetectionEnabled () && Address == 0) {
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if (IsNullDetectionEnabled () && Address == 0) {
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@ -209,6 +213,12 @@ ToSplitPageTable (
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}
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}
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}
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}
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if (GhcbBase != 0) {
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if ((Address < GhcbBase + GhcbSize) && ((Address + Size) > GhcbBase)) {
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return TRUE;
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}
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}
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return FALSE;
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return FALSE;
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}
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}
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/**
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/**
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@ -322,6 +332,8 @@ AllocatePageTableMemory (
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@param[in, out] PageEntry2M Pointer to 2M page entry.
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@param[in, out] PageEntry2M Pointer to 2M page entry.
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@param[in] StackBase Stack base address.
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@param[in] StackBase Stack base address.
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@param[in] StackSize Stack size.
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@param[in] StackSize Stack size.
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@param[in] GhcbBase GHCB page area base address.
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@param[in] GhcbSize GHCB page area size.
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**/
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**/
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VOID
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VOID
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@ -329,7 +341,9 @@ Split2MPageTo4K (
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IN EFI_PHYSICAL_ADDRESS PhysicalAddress,
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IN EFI_PHYSICAL_ADDRESS PhysicalAddress,
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IN OUT UINT64 *PageEntry2M,
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IN OUT UINT64 *PageEntry2M,
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IN EFI_PHYSICAL_ADDRESS StackBase,
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IN EFI_PHYSICAL_ADDRESS StackBase,
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IN UINTN StackSize
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IN UINTN StackSize,
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IN EFI_PHYSICAL_ADDRESS GhcbBase,
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IN UINTN GhcbSize
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)
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)
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{
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{
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EFI_PHYSICAL_ADDRESS PhysicalAddress4K;
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EFI_PHYSICAL_ADDRESS PhysicalAddress4K;
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@ -355,7 +369,20 @@ Split2MPageTo4K (
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//
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//
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// Fill in the Page Table entries
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// Fill in the Page Table entries
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//
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//
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PageTableEntry->Uint64 = (UINT64) PhysicalAddress4K | AddressEncMask;
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PageTableEntry->Uint64 = (UINT64) PhysicalAddress4K;
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//
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// The GHCB range consists of two pages per CPU, the GHCB and a
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// per-CPU variable page. The GHCB page needs to be mapped as an
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// unencrypted page while the per-CPU variable page needs to be
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// mapped encrypted. These pages alternate in assignment.
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//
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if ((GhcbBase == 0)
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|| (PhysicalAddress4K < GhcbBase)
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|| (PhysicalAddress4K >= GhcbBase + GhcbSize)
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|| (((PhysicalAddress4K - GhcbBase) & SIZE_4KB) != 0)) {
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PageTableEntry->Uint64 |= AddressEncMask;
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}
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PageTableEntry->Bits.ReadWrite = 1;
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PageTableEntry->Bits.ReadWrite = 1;
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if ((IsNullDetectionEnabled () && PhysicalAddress4K == 0) ||
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if ((IsNullDetectionEnabled () && PhysicalAddress4K == 0) ||
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@ -383,6 +410,8 @@ Split2MPageTo4K (
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@param[in, out] PageEntry1G Pointer to 1G page entry.
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@param[in, out] PageEntry1G Pointer to 1G page entry.
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@param[in] StackBase Stack base address.
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@param[in] StackBase Stack base address.
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@param[in] StackSize Stack size.
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@param[in] StackSize Stack size.
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@param[in] GhcbBase GHCB page area base address.
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@param[in] GhcbSize GHCB page area size.
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**/
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**/
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VOID
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VOID
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@ -390,7 +419,9 @@ Split1GPageTo2M (
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IN EFI_PHYSICAL_ADDRESS PhysicalAddress,
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IN EFI_PHYSICAL_ADDRESS PhysicalAddress,
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IN OUT UINT64 *PageEntry1G,
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IN OUT UINT64 *PageEntry1G,
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IN EFI_PHYSICAL_ADDRESS StackBase,
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IN EFI_PHYSICAL_ADDRESS StackBase,
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IN UINTN StackSize
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IN UINTN StackSize,
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IN EFI_PHYSICAL_ADDRESS GhcbBase,
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IN UINTN GhcbSize
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)
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)
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{
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{
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EFI_PHYSICAL_ADDRESS PhysicalAddress2M;
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EFI_PHYSICAL_ADDRESS PhysicalAddress2M;
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@ -413,11 +444,11 @@ Split1GPageTo2M (
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PhysicalAddress2M = PhysicalAddress;
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PhysicalAddress2M = PhysicalAddress;
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for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress2M += SIZE_2MB) {
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for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress2M += SIZE_2MB) {
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if (ToSplitPageTable (PhysicalAddress2M, SIZE_2MB, StackBase, StackSize)) {
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if (ToSplitPageTable (PhysicalAddress2M, SIZE_2MB, StackBase, StackSize, GhcbBase, GhcbSize)) {
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//
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//
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// Need to split this 2M page that covers NULL or stack range.
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// Need to split this 2M page that covers NULL or stack range.
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//
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//
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Split2MPageTo4K (PhysicalAddress2M, (UINT64 *) PageDirectoryEntry, StackBase, StackSize);
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Split2MPageTo4K (PhysicalAddress2M, (UINT64 *) PageDirectoryEntry, StackBase, StackSize, GhcbBase, GhcbSize);
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} else {
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} else {
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//
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//
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// Fill in the Page Directory entries
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// Fill in the Page Directory entries
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@ -616,6 +647,8 @@ EnablePageTableProtection (
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@param[in] StackBase Stack base address.
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@param[in] StackBase Stack base address.
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@param[in] StackSize Stack size.
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@param[in] StackSize Stack size.
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@param[in] GhcbBase GHCB base address.
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@param[in] GhcbSize GHCB size.
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@return The address of 4 level page map.
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@return The address of 4 level page map.
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@ -623,7 +656,9 @@ EnablePageTableProtection (
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UINTN
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UINTN
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CreateIdentityMappingPageTables (
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CreateIdentityMappingPageTables (
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IN EFI_PHYSICAL_ADDRESS StackBase,
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IN EFI_PHYSICAL_ADDRESS StackBase,
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IN UINTN StackSize
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IN UINTN StackSize,
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IN EFI_PHYSICAL_ADDRESS GhcbBase,
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IN UINTN GhcbSize
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)
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)
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{
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{
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UINT32 RegEax;
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UINT32 RegEax;
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PageDirectory1GEntry = (VOID *) PageDirectoryPointerEntry;
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PageDirectory1GEntry = (VOID *) PageDirectoryPointerEntry;
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for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectory1GEntry++, PageAddress += SIZE_1GB) {
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for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectory1GEntry++, PageAddress += SIZE_1GB) {
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if (ToSplitPageTable (PageAddress, SIZE_1GB, StackBase, StackSize)) {
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if (ToSplitPageTable (PageAddress, SIZE_1GB, StackBase, StackSize, GhcbBase, GhcbSize)) {
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Split1GPageTo2M (PageAddress, (UINT64 *) PageDirectory1GEntry, StackBase, StackSize);
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Split1GPageTo2M (PageAddress, (UINT64 *) PageDirectory1GEntry, StackBase, StackSize, GhcbBase, GhcbSize);
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} else {
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} else {
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//
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//
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// Fill in the Page Directory entries
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// Fill in the Page Directory entries
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PageDirectoryPointerEntry->Bits.Present = 1;
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PageDirectoryPointerEntry->Bits.Present = 1;
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for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += SIZE_2MB) {
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for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += SIZE_2MB) {
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if (ToSplitPageTable (PageAddress, SIZE_2MB, StackBase, StackSize)) {
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if (ToSplitPageTable (PageAddress, SIZE_2MB, StackBase, StackSize, GhcbBase, GhcbSize)) {
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//
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//
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// Need to split this 2M page that covers NULL or stack range.
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// Need to split this 2M page that covers NULL or stack range.
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//
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//
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Split2MPageTo4K (PageAddress, (UINT64 *) PageDirectoryEntry, StackBase, StackSize);
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Split2MPageTo4K (PageAddress, (UINT64 *) PageDirectoryEntry, StackBase, StackSize, GhcbBase, GhcbSize);
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} else {
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} else {
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//
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//
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// Fill in the Page Directory entries
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// Fill in the Page Directory entries
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@ -201,6 +201,8 @@ EnableExecuteDisableBit (
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@param[in, out] PageEntry2M Pointer to 2M page entry.
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@param[in, out] PageEntry2M Pointer to 2M page entry.
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@param[in] StackBase Stack base address.
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@param[in] StackBase Stack base address.
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@param[in] StackSize Stack size.
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@param[in] StackSize Stack size.
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@param[in] GhcbBase GHCB page area base address.
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@param[in] GhcbSize GHCB page area size.
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**/
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**/
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VOID
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VOID
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@ -208,7 +210,9 @@ Split2MPageTo4K (
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IN EFI_PHYSICAL_ADDRESS PhysicalAddress,
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IN EFI_PHYSICAL_ADDRESS PhysicalAddress,
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IN OUT UINT64 *PageEntry2M,
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IN OUT UINT64 *PageEntry2M,
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IN EFI_PHYSICAL_ADDRESS StackBase,
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IN EFI_PHYSICAL_ADDRESS StackBase,
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IN UINTN StackSize
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IN UINTN StackSize,
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IN EFI_PHYSICAL_ADDRESS GhcbBase,
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IN UINTN GhcbSize
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);
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);
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/**
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/**
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@ -217,6 +221,8 @@ Split2MPageTo4K (
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@param[in] StackBase Stack base address.
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@param[in] StackBase Stack base address.
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@param[in] StackSize Stack size.
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@param[in] StackSize Stack size.
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@param[in] GhcbBase GHCB page area base address.
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@param[in] GhcbSize GHCB page area size.
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@return The address of 4 level page map.
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@return The address of 4 level page map.
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UINTN
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UINTN
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CreateIdentityMappingPageTables (
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CreateIdentityMappingPageTables (
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IN EFI_PHYSICAL_ADDRESS StackBase,
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IN EFI_PHYSICAL_ADDRESS StackBase,
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IN UINTN StackSize
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IN UINTN StackSize,
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IN EFI_PHYSICAL_ADDRESS GhcbBase,
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IN UINTN GhcbkSize
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);
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);
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