mirror of https://github.com/acidanthera/audk.git
Add computing Unit Chipset Subclass Progress Code definitions from PI 1.2 specification.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9146 6f19259b-4bc3-4df7-8a09-765794883524
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@ -208,6 +208,61 @@ typedef struct {
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// Computing Unit Chipset Subclass Progress Code definitions.
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//
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///
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/// South Bridge initialization prior to memory detection
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///
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#define EFI_CHIPSET_PC_PEI_CAR_SB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000000)
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///
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/// North Bridge initialization prior to memory detection
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///
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#define EFI_CHIPSET_PC_PEI_CAR_NB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000001)
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///
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/// South Bridge initialization after memory detection
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///
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#define EFI_CHIPSET_PC_PEI_MEM_SB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000002)
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///
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/// North Bridge initialization after memory detection
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///
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#define EFI_CHIPSET_PC_PEI_MEM_NB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000003)
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///
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/// PCI Host Bridge DXE initialization
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///
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#define EFI_CHIPSET_PC_DXE_HB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000004)
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///
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/// North Bridge DXE initialization
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///
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#define EFI_CHIPSET_PC_DXE_NB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000005)
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///
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/// North Bridge specific SMM initialization in DXE
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///
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#define EFI_CHIPSET_PC_DXE_NB_SMM_INIT (EFI_SUBCLASS_SPECIFIC|0x00000006)
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///
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/// Initialization of the South Bridge specific UEFI Runtime Services
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///
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#define EFI_CHIPSET_PC_DXE_SB_RT_INIT (EFI_SUBCLASS_SPECIFIC|0x00000007)
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///
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/// South Bridge DXE initialization
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///
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#define EFI_CHIPSET_PC_DXE_SB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000008)
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///
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/// South Bridge specific SMM initialization in DXE
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///
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#define EFI_CHIPSET_PC_DXE_SB_SMM_INIT (EFI_SUBCLASS_SPECIFIC|0x00000009)
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///
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/// Initialization of the South Bridge devices
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///
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#define EFI_CHIPSET_PC_DXE_SB_DEVICES_INIT (EFI_SUBCLASS_SPECIFIC|0x0000000a)
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///
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/// Computing Unit Class Error Code definitions.
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/// These are shared by all subclasses.
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