Add computing Unit Chipset Subclass Progress Code definitions from PI 1.2 specification.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9146 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
klu2 2009-08-20 04:45:08 +00:00
parent 90f6a2c69c
commit b2057cc911
1 changed files with 55 additions and 0 deletions

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@ -208,6 +208,61 @@ typedef struct {
// Computing Unit Chipset Subclass Progress Code definitions.
//
///
/// South Bridge initialization prior to memory detection
///
#define EFI_CHIPSET_PC_PEI_CAR_SB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000000)
///
/// North Bridge initialization prior to memory detection
///
#define EFI_CHIPSET_PC_PEI_CAR_NB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000001)
///
/// South Bridge initialization after memory detection
///
#define EFI_CHIPSET_PC_PEI_MEM_SB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000002)
///
/// North Bridge initialization after memory detection
///
#define EFI_CHIPSET_PC_PEI_MEM_NB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000003)
///
/// PCI Host Bridge DXE initialization
///
#define EFI_CHIPSET_PC_DXE_HB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000004)
///
/// North Bridge DXE initialization
///
#define EFI_CHIPSET_PC_DXE_NB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000005)
///
/// North Bridge specific SMM initialization in DXE
///
#define EFI_CHIPSET_PC_DXE_NB_SMM_INIT (EFI_SUBCLASS_SPECIFIC|0x00000006)
///
/// Initialization of the South Bridge specific UEFI Runtime Services
///
#define EFI_CHIPSET_PC_DXE_SB_RT_INIT (EFI_SUBCLASS_SPECIFIC|0x00000007)
///
/// South Bridge DXE initialization
///
#define EFI_CHIPSET_PC_DXE_SB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000008)
///
/// South Bridge specific SMM initialization in DXE
///
#define EFI_CHIPSET_PC_DXE_SB_SMM_INIT (EFI_SUBCLASS_SPECIFIC|0x00000009)
///
/// Initialization of the South Bridge devices
///
#define EFI_CHIPSET_PC_DXE_SB_DEVICES_INIT (EFI_SUBCLASS_SPECIFIC|0x0000000a)
///
/// Computing Unit Class Error Code definitions.
/// These are shared by all subclasses.