mirror of https://github.com/acidanthera/audk.git
OvmfPkg: replace PcdAcpiPmBaseAddress with PIIX4_PMBA_VALUE
In the next patches, we'll differentiate the PMBA IO port address that we program on PIIX4 vs. Q35. Normally we'd just turn PcdAcpiPmBaseAddress into a dynamic PCD. However, because we need this value in BaseRomAcpiTimerLib too (which cannot access RAM and dynamic PCDs), it must remain a build time constant. We will introduce its Q35 counterpart later. As first step, replace the PCD with a new macro in "OvmfPlatforms.h"; Jordan prefers the latter to fixed PCDs in this instance. Cc: Gabriel Somlo <somlo@cmu.edu> Cc: Jordan Justen <jordan.l.justen@intel.com> Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1333238 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Gabriel Somlo <somlo@cmu.edu>
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@ -27,6 +27,11 @@
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#define OVMF_HOSTBRIDGE_DID \
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#define OVMF_HOSTBRIDGE_DID \
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PCI_LIB_ADDRESS (0, 0, 0, PCI_DEVICE_ID_OFFSET)
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PCI_LIB_ADDRESS (0, 0, 0, PCI_DEVICE_ID_OFFSET)
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//
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// Values we program into the PM base address registers
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//
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#define PIIX4_PMBA_VALUE 0xB000
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//
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//
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// Common bits in same-purpose registers
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// Common bits in same-purpose registers
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//
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//
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@ -15,7 +15,6 @@
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#include <Library/DebugLib.h>
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/IoLib.h>
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#include <Library/PciLib.h>
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#include <Library/PciLib.h>
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#include <Library/PcdLib.h>
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#include <OvmfPlatforms.h>
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#include <OvmfPlatforms.h>
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//
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//
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@ -69,9 +68,9 @@ AcpiTimerLibConstructor (
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if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
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if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
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//
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//
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// If the Power Management Base Address is not programmed,
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// If the Power Management Base Address is not programmed,
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// then program the Power Management Base Address from a PCD.
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// then program it now.
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//
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//
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PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PcdGet16 (PcdAcpiPmBaseAddress));
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PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PIIX4_PMBA_VALUE);
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//
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//
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// Enable PMBA I/O port decodes
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// Enable PMBA I/O port decodes
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@ -31,9 +31,6 @@
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MdePkg/MdePkg.dec
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MdePkg/MdePkg.dec
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OvmfPkg/OvmfPkg.dec
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OvmfPkg/OvmfPkg.dec
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[Pcd]
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gUefiOvmfPkgTokenSpaceGuid.PcdAcpiPmBaseAddress
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[LibraryClasses]
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[LibraryClasses]
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BaseLib
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BaseLib
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PciLib
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PciLib
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@ -16,7 +16,6 @@
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#include <Library/DebugLib.h>
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/IoLib.h>
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#include <Library/PciLib.h>
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#include <Library/PciLib.h>
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#include <Library/PcdLib.h>
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#include <OvmfPlatforms.h>
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#include <OvmfPlatforms.h>
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/**
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/**
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@ -67,9 +66,9 @@ AcpiTimerLibConstructor (
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if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
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if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
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//
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//
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// If the Power Management Base Address is not programmed,
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// If the Power Management Base Address is not programmed,
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// then program the Power Management Base Address from a PCD.
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// then program it now.
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//
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//
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PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PcdGet16 (PcdAcpiPmBaseAddress));
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PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PIIX4_PMBA_VALUE);
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//
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//
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// Enable PMBA I/O port decodes
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// Enable PMBA I/O port decodes
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@ -30,9 +30,6 @@
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MdePkg/MdePkg.dec
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MdePkg/MdePkg.dec
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OvmfPkg/OvmfPkg.dec
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OvmfPkg/OvmfPkg.dec
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[Pcd]
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gUefiOvmfPkgTokenSpaceGuid.PcdAcpiPmBaseAddress
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[LibraryClasses]
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[LibraryClasses]
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BaseLib
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BaseLib
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PciLib
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PciLib
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@ -17,9 +17,10 @@
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#include <Library/BaseLib.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/IoLib.h>
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#include <Library/PcdLib.h>
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#include <Library/TimerLib.h>
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#include <Library/TimerLib.h>
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#include <OvmfPlatforms.h>
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VOID
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VOID
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AcpiPmControl (
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AcpiPmControl (
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UINTN SuspendType
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UINTN SuspendType
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@ -27,8 +28,8 @@ AcpiPmControl (
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{
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{
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ASSERT (SuspendType < 6);
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ASSERT (SuspendType < 6);
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IoBitFieldWrite16 (PcdGet16 (PcdAcpiPmBaseAddress) + 4, 10, 13, (UINT16) SuspendType);
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IoBitFieldWrite16 (PIIX4_PMBA_VALUE + 4, 10, 13, (UINT16) SuspendType);
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IoOr16 (PcdGet16 (PcdAcpiPmBaseAddress) + 4, BIT13);
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IoOr16 (PIIX4_PMBA_VALUE + 4, BIT13);
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CpuDeadLoop ();
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CpuDeadLoop ();
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}
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}
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@ -37,6 +37,3 @@
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DebugLib
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DebugLib
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IoLib
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IoLib
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TimerLib
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TimerLib
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[Pcd]
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gUefiOvmfPkgTokenSpaceGuid.PcdAcpiPmBaseAddress
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@ -75,10 +75,6 @@
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## This flag is used to control the destination port for PlatformDebugLibIoPort
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## This flag is used to control the destination port for PlatformDebugLibIoPort
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gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4
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gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4
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## This flag determines the Power Management Base Address of choice, written
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# to PIIX4 function 3 offset 0x40-0x43 bits [15:6].
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gUefiOvmfPkgTokenSpaceGuid.PcdAcpiPmBaseAddress|0xB000|UINT16|5
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## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and
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## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and
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# LUNs are retrieved from the host during virtio-scsi setup.
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# LUNs are retrieved from the host during virtio-scsi setup.
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# MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun
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# MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun
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@ -412,7 +412,7 @@ MiscInitialization (
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// The PEI phase should be exited with fully accessibe ACPI PM IO space:
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// The PEI phase should be exited with fully accessibe ACPI PM IO space:
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// 1. set PMBA
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// 1. set PMBA
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//
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//
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PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PcdGet16 (PcdAcpiPmBaseAddress));
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PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PIIX4_PMBA_VALUE);
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//
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//
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// 2. set PCICMD/IOSE
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// 2. set PCICMD/IOSE
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@ -65,7 +65,6 @@
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize
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gUefiOvmfPkgTokenSpaceGuid.PcdAcpiPmBaseAddress
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gUefiOvmfPkgTokenSpaceGuid.PcdS3AcpiReservedMemoryBase
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gUefiOvmfPkgTokenSpaceGuid.PcdS3AcpiReservedMemoryBase
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
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