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IntelFsp2WrapperPkg BaseFspWrapperApiLib: Remove MASM/GAS files
Keep NASM file only for new added modules. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
This commit is contained in:
Liming Gao
parent
6f5531d504
commit
b422ddb215
@ -45,8 +45,6 @@
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[Sources.X64]
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[Sources.X64]
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X64/DispatchExecute.c
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X64/DispatchExecute.c
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X64/Thunk64To32.asm
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X64/Thunk64To32.S
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X64/Thunk64To32.nasm
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X64/Thunk64To32.nasm
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################################################################################
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################################################################################
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@ -1,230 +0,0 @@
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#
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# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php.
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#
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# Module Name:
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#
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# Thunk64To32.asm
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#
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# Abstract:
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#
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# This is the assembly code to transition from long mode to compatibility mode to execute 32-bit code and then
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# transit back to long mode.
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#
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#-------------------------------------------------------------------------------
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#----------------------------------------------------------------------------
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# Procedure: AsmExecute32BitCode
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#
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# Input: None
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#
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# Output: None
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#
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# Prototype: UINT32
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# AsmExecute32BitCode (
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# IN UINT64 Function,
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# IN UINT64 Param1,
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# IN UINT64 Param2,
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# IN IA32_DESCRIPTOR *InternalGdtr
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# );
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#
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#
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# Description: A thunk function to execute 32-bit code in long mode.
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#
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#----------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(AsmExecute32BitCode)
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ASM_PFX(AsmExecute32BitCode):
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#
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# save IFLAG and disable it
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#
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pushfq
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cli
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#
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# save orignal GDTR and CS
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#
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movl %ds, %eax
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push %rax
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movl %cs, %eax
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push %rax
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subq $0x10, %rsp
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sgdt (%rsp)
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#
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# load internal GDT
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#
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lgdt (%r9)
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#
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# Save general purpose register and rflag register
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#
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pushfq
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push %rdi
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push %rsi
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push %rbp
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push %rbx
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#
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# save CR3
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#
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movq %cr3, %rax
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movq %rax, %rbp
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#
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# Prepare the CS and return address for the transition from 32-bit to 64-bit mode
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#
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movq $0x10, %rax # load long mode selector
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shl $32, %rax
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lea ReloadCS(%rip), %r9 #Assume the ReloadCS is under 4G
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orq %r9, %rax
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push %rax
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#
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# Save parameters for 32-bit function call
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#
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movq %r8, %rax
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shl $32, %rax
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orq %rdx, %rax
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push %rax
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#
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# save the 32-bit function entry and the return address into stack which will be
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# retrieve in compatibility mode.
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#
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lea ReturnBack(%rip), %rax #Assume the ReloadCS is under 4G
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shl $32, %rax
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orq %rcx, %rax
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push %rax
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#
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# let rax save DS
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#
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movq $0x18, %rax
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#
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# Change to Compatible Segment
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#
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movq $8, %rcx # load compatible mode selector
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shl $32, %rcx
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lea Compatible(%rip), %rdx # assume address < 4G
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orq %rdx, %rcx
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push %rcx
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.byte 0xcb # retf
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Compatible:
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# reload DS/ES/SS to make sure they are correct referred to current GDT
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movw %ax, %ds
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movw %ax, %es
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movw %ax, %ss
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#
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# Disable paging
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#
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movq %cr0, %rcx
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btc $31, %ecx
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movq %rcx, %cr0
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#
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# Clear EFER.LME
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#
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movl $0xC0000080, %ecx
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rdmsr
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btc $8, %eax
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wrmsr
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# Now we are in protected mode
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#
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# Call 32-bit function. Assume the function entry address and parameter value is less than 4G
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#
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pop %rax # Here is the function entry
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#
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# Now the parameter is at the bottom of the stack, then call in to IA32 function.
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#
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jmp *%rax
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ReturnBack:
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movl %eax, %ebx # save return status
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pop %rcx # drop param1
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pop %rcx # drop param2
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#
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# restore CR4
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#
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movq %cr4, %rax
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bts $5, %eax
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movq %rax, %cr4
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#
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# restore CR3
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#
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movl %ebp, %eax
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movq %rax, %cr3
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#
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# Set EFER.LME to re-enable ia32-e
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#
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movl $0xC0000080, %ecx
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rdmsr
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bts $8, %eax
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wrmsr
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#
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# Enable paging
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#
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movq %cr0, %rax
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bts $31, %eax
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mov %rax, %cr0
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# Now we are in compatible mode
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#
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# Reload cs register
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#
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.byte 0xcb # retf
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ReloadCS:
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#
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# Now we're in Long Mode
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#
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#
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# Restore C register and eax hold the return status from 32-bit function.
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# Note: Do not touch rax from now which hold the return value from IA32 function
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#
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movl %ebx, %eax # put return status to EAX
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pop %rbx
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pop %rbp
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pop %rsi
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pop %rdi
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popfq
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#
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# Switch to orignal GDT and CS. here rsp is pointer to the orignal GDT descriptor.
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#
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lgdt (%rsp)
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#
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# drop GDT descriptor in stack
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#
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addq $0x10, %rsp
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#
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# switch to orignal CS and GDTR
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#
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pop %r9 # get CS
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shl $32, %r9 # rcx[32..47] <- Cs
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lea ReturnToLongMode(%rip), %rcx
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orq %r9, %rcx
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push %rcx
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.byte 0xcb # retf
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ReturnToLongMode:
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#
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# Reload original DS/ES/SS
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#
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pop %rcx
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movl %ecx, %ds
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movl %ecx, %es
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movl %ecx, %ss
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#
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# Restore IFLAG
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#
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popfq
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ret
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@ -1,230 +0,0 @@
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;
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; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php.
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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;
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; Module Name:
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;
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; Thunk64To32.asm
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;
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; Abstract:
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;
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; This is the assembly code to transition from long mode to compatibility mode to execute 32-bit code and then
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; transit back to long mode.
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;
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;-------------------------------------------------------------------------------
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.code
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;----------------------------------------------------------------------------
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; Procedure: AsmExecute32BitCode
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;
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; Input: None
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;
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; Output: None
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;
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; Prototype: UINT32
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; AsmExecute32BitCode (
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; IN UINT64 Function,
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; IN UINT64 Param1,
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; IN UINT64 Param2,
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; IN IA32_DESCRIPTOR *InternalGdtr
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; );
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;
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;
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; Description: A thunk function to execute 32-bit code in long mode.
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;
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;----------------------------------------------------------------------------
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AsmExecute32BitCode PROC
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;
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; save IFLAG and disable it
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;
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pushfq
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cli
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;
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; save orignal GDTR and CS
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;
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mov rax, ds
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push rax
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mov rax, cs
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push rax
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sub rsp, 10h
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sgdt fword ptr [rsp]
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;
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; load internal GDT
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;
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lgdt fword ptr [r9]
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;
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; Save general purpose register and rflag register
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;
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pushfq
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push rdi
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push rsi
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push rbp
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push rbx
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;
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; save CR3
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;
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mov rax, cr3
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mov rbp, rax
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;
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; Prepare the CS and return address for the transition from 32-bit to 64-bit mode
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;
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mov rax, 10h ; load long mode selector
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shl rax, 32
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mov r9, OFFSET ReloadCS ;Assume the ReloadCS is under 4G
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or rax, r9
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push rax
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;
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; Save parameters for 32-bit function call
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;
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mov rax, r8
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shl rax, 32
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or rax, rdx
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push rax
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;
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; save the 32-bit function entry and the return address into stack which will be
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; retrieve in compatibility mode.
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;
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mov rax, OFFSET ReturnBack ;Assume the ReloadCS is under 4G
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shl rax, 32
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or rax, rcx
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push rax
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;
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; let rax save DS
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;
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mov rax, 018h
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;
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; Change to Compatible Segment
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;
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mov rcx, 08h ; load compatible mode selector
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shl rcx, 32
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mov rdx, OFFSET Compatible ; assume address < 4G
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or rcx, rdx
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push rcx
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retf
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Compatible:
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; reload DS/ES/SS to make sure they are correct referred to current GDT
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mov ds, ax
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mov es, ax
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mov ss, ax
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;
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; Disable paging
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;
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mov rcx, cr0
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btc ecx, 31
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mov cr0, rcx
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;
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; Clear EFER.LME
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;
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mov ecx, 0C0000080h
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rdmsr
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btc eax, 8
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wrmsr
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; Now we are in protected mode
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;
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; Call 32-bit function. Assume the function entry address and parameter value is less than 4G
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;
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pop rax ; Here is the function entry
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;
|
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; Now the parameter is at the bottom of the stack, then call in to IA32 function.
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;
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jmp rax
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ReturnBack:
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mov ebx, eax ; save return status
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pop rcx ; drop param1
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pop rcx ; drop param2
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;
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; restore CR4
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;
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mov rax, cr4
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bts eax, 5
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mov cr4, rax
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;
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; restore CR3
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;
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mov eax, ebp
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mov cr3, rax
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;
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; Set EFER.LME to re-enable ia32-e
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;
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mov ecx, 0C0000080h
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rdmsr
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bts eax, 8
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wrmsr
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;
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; Enable paging
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;
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mov rax, cr0
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bts eax, 31
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mov cr0, rax
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; Now we are in compatible mode
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;
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; Reload cs register
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;
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retf
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ReloadCS:
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;
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; Now we're in Long Mode
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;
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;
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; Restore C register and eax hold the return status from 32-bit function.
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; Note: Do not touch rax from now which hold the return value from IA32 function
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;
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mov eax, ebx ; put return status to EAX
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pop rbx
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pop rbp
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pop rsi
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pop rdi
|
|
||||||
popfq
|
|
||||||
;
|
|
||||||
; Switch to orignal GDT and CS. here rsp is pointer to the orignal GDT descriptor.
|
|
||||||
;
|
|
||||||
lgdt fword ptr[rsp]
|
|
||||||
;
|
|
||||||
; drop GDT descriptor in stack
|
|
||||||
;
|
|
||||||
add rsp, 10h
|
|
||||||
;
|
|
||||||
; switch to orignal CS and GDTR
|
|
||||||
;
|
|
||||||
pop r9 ; get CS
|
|
||||||
shl r9, 32 ; rcx[32..47] <- Cs
|
|
||||||
mov rcx, OFFSET @F
|
|
||||||
or rcx, r9
|
|
||||||
push rcx
|
|
||||||
retf
|
|
||||||
@@:
|
|
||||||
;
|
|
||||||
; Reload original DS/ES/SS
|
|
||||||
;
|
|
||||||
pop rcx
|
|
||||||
mov ds, rcx
|
|
||||||
mov es, rcx
|
|
||||||
mov ss, rcx
|
|
||||||
|
|
||||||
;
|
|
||||||
; Restore IFLAG
|
|
||||||
;
|
|
||||||
popfq
|
|
||||||
|
|
||||||
ret
|
|
||||||
AsmExecute32BitCode ENDP
|
|
||||||
|
|
||||||
END
|
|
||||||
Loading…
x
Reference in New Issue
Block a user