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[Description]:

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Sync 3 trackers.
 1. A bug that may cause the low/full speed device behind 2.0 hub will not work.
 2. MajorRevision and MinorRevision need updating.
 3. Misuse UhciConvertPollRate in UHCI driver.
[Impaction]:
 EhicDxe, UhciDxe and UsbBusDxe.
[Reference Info]:
 EDK tracker 1122 - A bug that may cause the low/full speed device behind 2.0 hub will not work .
 EDK tracker 1101 - Phoenix found issue in USB and Misuse UhciConvertPollRate in UHCI driver.



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@5370 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
vanjeff 2008-06-25 05:50:41 +00:00
parent 2a10d87453
commit b4c24e2d42
6 changed files with 23 additions and 16 deletions
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6
MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c
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@ -1,6 +1,6 @@
/** @file /** @file
Copyright (c) 2006 - 2007, Intel Corporation Copyright (c) 2006 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -1436,8 +1436,8 @@ EhcCreateUsb2Hc (
Ehc->Usb2Hc.GetRootHubPortStatus = EhcGetRootHubPortStatus; Ehc->Usb2Hc.GetRootHubPortStatus = EhcGetRootHubPortStatus;
Ehc->Usb2Hc.SetRootHubPortFeature = EhcSetRootHubPortFeature; Ehc->Usb2Hc.SetRootHubPortFeature = EhcSetRootHubPortFeature;
Ehc->Usb2Hc.ClearRootHubPortFeature = EhcClearRootHubPortFeature; Ehc->Usb2Hc.ClearRootHubPortFeature = EhcClearRootHubPortFeature;
Ehc->Usb2Hc.MajorRevision = 0x1; Ehc->Usb2Hc.MajorRevision = 0x2;
Ehc->Usb2Hc.MinorRevision = 0x1; Ehc->Usb2Hc.MinorRevision = 0x0;
Ehc->PciIo = PciIo; Ehc->PciIo = PciIo;
Ehc->OriginalPciAttributes = OriginalPciAttributes; Ehc->OriginalPciAttributes = OriginalPciAttributes;

7
MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
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@ -1,6 +1,6 @@
/** @file /** @file
Copyright (c) 2004 - 2007, Intel Corporation Copyright (c) 2004 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -313,9 +313,10 @@ Uhci2GetCapability (
// returns 0 in this bit if port number is invalid. Also, if // returns 0 in this bit if port number is invalid. Also, if
// PciIo IoRead returns error, 0xFFFF is returned to caller. // PciIo IoRead returns error, 0xFFFF is returned to caller.
// //
if (((PortSC & 0x80) != 0) && (PortSC != 0xFFFF)) { if (((PortSC & 0x80) == 0) || (PortSC == 0xFFFF)) {
(*PortNumber)++; break;
} }
(*PortNumber)++;
} }
Uhc->RootPorts = *PortNumber; Uhc->RootPorts = *PortNumber;

4
MdeModulePkg/Bus/Pci/UhciDxe/UhciQueue.c
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@ -1,6 +1,6 @@
/** @file /** @file
Copyright (c) 2007, Intel Corporation Copyright (c) 2007 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -280,7 +280,7 @@ UhciCreateQh (
Qh->QhHw.HorizonLink = QH_HLINK (NULL, TRUE); Qh->QhHw.HorizonLink = QH_HLINK (NULL, TRUE);
Qh->QhHw.VerticalLink = QH_VLINK (NULL, TRUE); Qh->QhHw.VerticalLink = QH_VLINK (NULL, TRUE);
Qh->Interval = Interval; Qh->Interval = UhciConvertPollRate(Interval);
Qh->TDs = NULL; Qh->TDs = NULL;
Qh->NextQh = NULL; Qh->NextQh = NULL;

11
MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.h
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@ -1,6 +1,6 @@
/** @file /** @file
Copyright (c) 2007, Intel Corporation Copyright (c) 2007 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -68,8 +68,13 @@ enum {
USBPORTSC_PR = BIT(9), // Port Reset USBPORTSC_PR = BIT(9), // Port Reset
USBPORTSC_SUSP = BIT(12), // Suspend USBPORTSC_SUSP = BIT(12), // Suspend
USB_MAX_ROOTHUB_PORT = 0x0F, // Max number of root hub port //
// UHCI Spec said it must implement 2 ports each host at least,
// and if more, check whether the bit7 of PORTSC is always 1.
// So here assume the max of port number each host is 16.
//
USB_MAX_ROOTHUB_PORT = 0x0F,
// //
// Command register bit definitions // Command register bit definitions
// //

4
MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c
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@ -1,6 +1,6 @@
/** @file /** @file
Copyright (c) 2007, Intel Corporation Copyright (c) 2007 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -704,7 +704,7 @@ UhciCreateAsyncReq (
AsyncReq->DevAddr = DevAddr; AsyncReq->DevAddr = DevAddr;
AsyncReq->EndPoint = EndPoint; AsyncReq->EndPoint = EndPoint;
AsyncReq->DataLen = DataLen; AsyncReq->DataLen = DataLen;
AsyncReq->Interval = Interval; AsyncReq->Interval = UhciConvertPollRate(Interval);
AsyncReq->Mapping = Mapping; AsyncReq->Mapping = Mapping;
AsyncReq->Data = Data; AsyncReq->Data = Data;
AsyncReq->Callback = Callback; AsyncReq->Callback = Callback;

7
MdeModulePkg/Bus/Usb/UsbBusDxe/UsbEnumer.c
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@ -1,6 +1,6 @@
/** @file /** @file
Copyright (c) 2007, Intel Corporation Copyright (c) 2007 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -713,13 +713,14 @@ UsbEnumerateNewDev (
if (Child->Speed != EFI_USB_SPEED_HIGH) { if (Child->Speed != EFI_USB_SPEED_HIGH) {
// //
// If the child isn't a high speed device, it is necessary to // If the child isn't a high speed device, it is necessary to
// set the transaction translator. This is quite simple: // set the transaction translator. Port TT is 1-based.
// This is quite simple:
// 1. if parent is of high speed, then parent is our translator // 1. if parent is of high speed, then parent is our translator
// 2. otherwise use parent's translator. // 2. otherwise use parent's translator.
// //
if (Parent->Speed == EFI_USB_SPEED_HIGH) { if (Parent->Speed == EFI_USB_SPEED_HIGH) {
Child->Translator.TranslatorHubAddress = Parent->Address; Child->Translator.TranslatorHubAddress = Parent->Address;
Child->Translator.TranslatorPortNumber = Port; Child->Translator.TranslatorPortNumber = Port + 1;
} else { } else {
Child->Translator = Parent->Translator; Child->Translator = Parent->Translator;