mirror of https://github.com/acidanthera/audk.git
OvmfPkg/FdtPciHostBridgeLib: io range is not mandatory
io range is not mandatory according to pcie spec, so allow host bridges without io address space. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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@ -292,13 +292,8 @@ ProcessPciHost (
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}
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}
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if ((*IoSize == 0) || (*Mmio32Size == 0)) {
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DEBUG ((
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DEBUG_ERROR,
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"%a: %a space empty\n",
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__FUNCTION__,
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(*IoSize == 0) ? "IO" : "MMIO32"
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));
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if (*Mmio32Size == 0) {
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DEBUG ((DEBUG_ERROR, "%a: MMIO32 space empty\n", __FUNCTION__));
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return EFI_PROTOCOL_ERROR;
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}
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@ -333,13 +328,15 @@ ProcessPciHost (
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return Status;
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}
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//
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// Map the MMIO window that provides I/O access - the PCI host bridge code
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// is not aware of this translation and so it will only map the I/O view
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// in the GCD I/O map.
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//
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Status = MapGcdMmioSpace (*IoBase + IoTranslation, *IoSize);
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ASSERT_EFI_ERROR (Status);
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if (*IoSize != 0) {
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//
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// Map the MMIO window that provides I/O access - the PCI host bridge code
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// is not aware of this translation and so it will only map the I/O view
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// in the GCD I/O map.
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//
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Status = MapGcdMmioSpace (*IoBase + IoTranslation, *IoSize);
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ASSERT_EFI_ERROR (Status);
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}
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return Status;
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}
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@ -413,17 +410,21 @@ PciHostBridgeGetRootBridges (
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AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
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Io.Base = IoBase;
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Io.Limit = IoBase + IoSize - 1;
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if (IoSize != 0) {
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Io.Base = IoBase;
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Io.Limit = IoBase + IoSize - 1;
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} else {
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Io.Base = MAX_UINT64;
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Io.Limit = 0;
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}
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Mem.Base = Mmio32Base;
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Mem.Limit = Mmio32Base + Mmio32Size - 1;
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if (sizeof (UINTN) == sizeof (UINT64)) {
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MemAbove4G.Base = Mmio64Base;
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MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1;
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if (Mmio64Size > 0) {
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AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
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}
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if ((sizeof (UINTN) == sizeof (UINT64)) && (Mmio64Size != 0)) {
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MemAbove4G.Base = Mmio64Base;
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MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1;
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AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
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} else {
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//
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// UEFI mandates a 1:1 virtual-to-physical mapping, so on a 32-bit
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