tyler.durden
/
audk
mirror of https://github.com/acidanthera/audk.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

ArmPkg/ArmDmaLib: assert that consistent mappings are uncached 

DmaMap () only allows uncached mappings to be used for creating consistent
mappings with operation type MapOperationBusMasterCommonBuffer. However,
if the buffer passed to DmaMap () happens to be aligned to the CWG, there
is no need for a bounce buffer, and we perform the cache maintenance
directly without ever checking if the memory attributes of the buffer
adhere to the API.

So add some debug code that asserts that the operation type and the memory
attributes are consistent.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
This commit is contained in:
Ard Biesheuvel 2016-04-20 10:29:21 +02:00
parent 32e5fb76e5
commit b64e44cc09
1 changed files with 17 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
ArmPkg/Library/ArmDmaLib/ArmDmaLib.c
View File

@ -136,6 +136,23 @@ DmaMap (
} else {
Map->DoubleBuffer = FALSE;
DEBUG_CODE_BEGIN ();
//
// The operation type check above only executes if the buffer happens to be
// misaligned with respect to CWG, but even if it is aligned, we should not
// allow arbitrary buffers to be used for creating consistent mappings.
// So duplicate the check here when running in DEBUG mode, just to assert
// that we are not trying to create a consistent mapping for cached memory.
//
Status = gDS->GetMemorySpaceDescriptor (*DeviceAddress, &GcdDescriptor);
ASSERT_EFI_ERROR(Status);
ASSERT (Operation != MapOperationBusMasterCommonBuffer ||
(GcdDescriptor.Attributes & (EFI_MEMORY_WB | EFI_MEMORY_WT)) == 0);
DEBUG_CODE_END ();
// Flush the Data Cache (should not have any effect if the memory region is uncached)
gCpu->FlushDataCache (gCpu, *DeviceAddress, *NumberOfBytes, EfiCpuFlushTypeWriteBackInvalidate);
}