mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/PiSmmCpuDxeSmm: Fix .S & .asm build failure
Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
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@ -28,6 +28,7 @@ ASM_GLOBAL ASM_PFX(mXdSupported)
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ASM_GLOBAL ASM_PFX(FeaturePcdGet (PcdCpuSmmStackGuard))
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ASM_GLOBAL ASM_PFX(FeaturePcdGet (PcdCpuSmmStackGuard))
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ASM_GLOBAL ASM_PFX(gSmiHandlerIdtr)
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ASM_GLOBAL ASM_PFX(gSmiHandlerIdtr)
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.equ MSR_IA32_MISC_ENABLE, 0x1A0
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.equ MSR_EFER, 0xc0000080
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.equ MSR_EFER, 0xc0000080
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.equ MSR_EFER_XD, 0x800
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.equ MSR_EFER_XD, 0x800
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@ -202,7 +202,7 @@ _SmiHandler PROC
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call eax
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call eax
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add esp, 4
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add esp, 4
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mov eax, mXdSupported
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mov eax, offset mXdSupported
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mov al, [eax]
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mov al, [eax]
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cmp al, 0
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cmp al, 0
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jz @f
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jz @f
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@ -158,7 +158,7 @@ L13:
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rdmsr
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rdmsr
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orw $MSR_EFER_XD,%ax # enable NXE
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orw $MSR_EFER_XD,%ax # enable NXE
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wrmsr
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wrmsr
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jmp @NxeDone
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jmp NxeDone
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SkipNxe:
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SkipNxe:
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subl $8, %esp
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subl $8, %esp
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NxeDone:
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NxeDone:
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@ -222,7 +222,7 @@ _SmiHandler:
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add rsp, 200h
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add rsp, 200h
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mov rax, ASM_PFX(mXdSupported)
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mov rax, offset ASM_PFX(mXdSupported)
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mov al, [rax]
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mov al, [rax]
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cmp al, 0
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cmp al, 0
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jz @f
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jz @f
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