diff --git a/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h b/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h
index e7d7fde14c..3973ff0a95 100644
--- a/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h
+++ b/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h
@@ -46,4 +46,9 @@
 #define PIIX4_PMREGMISC        0x80
 #define PIIX4_PMREGMISC_PMIOSE   BIT0
 
+//
+// IO ports
+//
+#define PIIX4_CPU_HOTPLUG_BASE 0xAF00
+
 #endif
diff --git a/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h b/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
index 391cb46222..2ac16f19c6 100644
--- a/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
+++ b/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
@@ -106,6 +106,8 @@
 #define ICH9_APM_CNT 0xB2
 #define ICH9_APM_STS 0xB3
 
+#define ICH9_CPU_HOTPLUG_BASE 0x0CD8
+
 //
 // IO ports relative to PMBASE
 //
diff --git a/OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h b/OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h
new file mode 100644
index 0000000000..cf0745610f
--- /dev/null
+++ b/OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h
@@ -0,0 +1,43 @@
+/** @file
+  Macros for accessing QEMU's CPU hotplug register block.
+
+  Copyright (C) 2019, Red Hat, Inc.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Specification Reference:
+
+  - "docs/specs/acpi_cpu_hotplug.txt" in the QEMU source tree.
+
+    The original (now "legacy") CPU hotplug interface appeared in QEMU v1.5.0.
+    The new ("modern") hotplug interface appeared in QEMU v2.7.0.
+
+    The macros in this header file map to the minimal subset of the modern
+    interface that OVMF needs.
+**/
+
+#ifndef QEMU_CPU_HOTPLUG_H_
+#define QEMU_CPU_HOTPLUG_H_
+
+#include <Base.h>
+
+//
+// Each register offset is:
+// - relative to the board-dependent IO base address of the register block,
+// - named QEMU_CPUHP_(R|W|RW)_*, according to the possible access modes of the
+//   register,
+// - followed by distinguished bitmasks or values in the register.
+//
+#define QEMU_CPUHP_R_CMD_DATA2               0x0
+
+#define QEMU_CPUHP_R_CPU_STAT                0x4
+#define QEMU_CPUHP_STAT_ENABLED                BIT0
+
+#define QEMU_CPUHP_RW_CMD_DATA               0x8
+
+#define QEMU_CPUHP_W_CPU_SEL                 0x0
+
+#define QEMU_CPUHP_W_CMD                     0x5
+#define QEMU_CPUHP_CMD_GET_PENDING             0x0
+
+#endif // QEMU_CPU_HOTPLUG_H_