UefiCpuPkg/PiSmmCpuDxeSmm: Consume new APIs

Consuming PeCoffSerachImageBase() from PeCoffGetEntrypointLib and consuming
DumpCpuContext() from CpuExceptionHandlerLib to replace its own implementation.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
This commit is contained in:
Jeff Fan 2017-04-01 19:39:22 +08:00
parent 1b2f7b3e49
commit b8caae191c
5 changed files with 18 additions and 65 deletions

View File

@ -1,7 +1,7 @@
/** @file /** @file
Page table manipulation functions for IA-32 processors Page table manipulation functions for IA-32 processors
Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR> Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR> Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
@ -88,8 +88,8 @@ SmiDefaultPFHandler (
VOID VOID
EFIAPI EFIAPI
SmiPFHandler ( SmiPFHandler (
IN EFI_EXCEPTION_TYPE InterruptType, IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_SYSTEM_CONTEXT SystemContext IN EFI_SYSTEM_CONTEXT SystemContext
) )
{ {
UINTN PFAddress; UINTN PFAddress;
@ -108,6 +108,7 @@ SmiPFHandler (
// //
if ((PFAddress >= mCpuHotPlugData.SmrrBase) && if ((PFAddress >= mCpuHotPlugData.SmrrBase) &&
(PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize))) { (PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize))) {
DumpCpuContext (InterruptType, SystemContext);
CpuIndex = GetCpuIndex (); CpuIndex = GetCpuIndex ();
GuardPageAddress = (mSmmStackArrayBase + EFI_PAGE_SIZE + CpuIndex * mSmmStackSize); GuardPageAddress = (mSmmStackArrayBase + EFI_PAGE_SIZE + CpuIndex * mSmmStackSize);
if ((FeaturePcdGet (PcdCpuSmmStackGuard)) && if ((FeaturePcdGet (PcdCpuSmmStackGuard)) &&
@ -115,15 +116,6 @@ SmiPFHandler (
(PFAddress < (GuardPageAddress + EFI_PAGE_SIZE))) { (PFAddress < (GuardPageAddress + EFI_PAGE_SIZE))) {
DEBUG ((DEBUG_ERROR, "SMM stack overflow!\n")); DEBUG ((DEBUG_ERROR, "SMM stack overflow!\n"));
} else { } else {
DEBUG ((DEBUG_ERROR, "SMM exception data - 0x%x(", SystemContext.SystemContextIa32->ExceptionData));
DEBUG ((DEBUG_ERROR, "I:%x, R:%x, U:%x, W:%x, P:%x",
(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0,
(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_RSVD) != 0,
(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_US) != 0,
(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_WR) != 0,
(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_P) != 0
));
DEBUG ((DEBUG_ERROR, ")\n"));
if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0) { if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0) {
DEBUG ((DEBUG_ERROR, "SMM exception at execution (0x%x)\n", PFAddress)); DEBUG ((DEBUG_ERROR, "SMM exception at execution (0x%x)\n", PFAddress));
DEBUG_CODE ( DEBUG_CODE (
@ -144,6 +136,7 @@ SmiPFHandler (
// //
if ((PFAddress < mCpuHotPlugData.SmrrBase) || if ((PFAddress < mCpuHotPlugData.SmrrBase) ||
(PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) { (PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) {
DumpCpuContext (InterruptType, SystemContext);
if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0) { if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0) {
DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%x) out of SMM range after SMM is locked!\n", PFAddress)); DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%x) out of SMM range after SMM is locked!\n", PFAddress));
DEBUG_CODE ( DEBUG_CODE (
@ -166,6 +159,7 @@ SmiPFHandler (
SystemContext.SystemContextIa32->ExceptionData SystemContext.SystemContextIa32->ExceptionData
); );
} else { } else {
DumpCpuContext (InterruptType, SystemContext);
SmiDefaultPFHandler (); SmiDefaultPFHandler ();
} }

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@ -173,48 +173,17 @@ DumpModuleInfoByIp (
) )
{ {
UINTN Pe32Data; UINTN Pe32Data;
EFI_IMAGE_DOS_HEADER *DosHdr;
EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr;
VOID *PdbPointer; VOID *PdbPointer;
UINT64 DumpIpAddress;
// //
// Find Image Base // Find Image Base
// //
Pe32Data = CallerIpAddress & ~(SIZE_4KB - 1); Pe32Data = PeCoffSerachImageBase (CallerIpAddress);
while (Pe32Data != 0) {
DosHdr = (EFI_IMAGE_DOS_HEADER *) Pe32Data;
if (DosHdr->e_magic == EFI_IMAGE_DOS_SIGNATURE) {
//
// DOS image header is present, so read the PE header after the DOS image header.
//
Hdr.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)(Pe32Data + (UINTN) ((DosHdr->e_lfanew) & 0x0ffff));
//
// Make sure PE header address does not overflow and is less than the initial address.
//
if (((UINTN)Hdr.Pe32 > Pe32Data) && ((UINTN)Hdr.Pe32 < CallerIpAddress)) {
if (Hdr.Pe32->Signature == EFI_IMAGE_NT_SIGNATURE) {
//
// It's PE image.
//
break;
}
}
}
//
// Not found the image base, check the previous aligned address
//
Pe32Data -= SIZE_4KB;
}
DumpIpAddress = CallerIpAddress;
DEBUG ((EFI_D_ERROR, "It is invoked from the instruction before IP(0x%lx)", DumpIpAddress));
if (Pe32Data != 0) { if (Pe32Data != 0) {
DEBUG ((DEBUG_ERROR, "It is invoked from the instruction before IP(0x%p)", (VOID *) CallerIpAddress));
PdbPointer = PeCoffLoaderGetPdbPointer ((VOID *) Pe32Data); PdbPointer = PeCoffLoaderGetPdbPointer ((VOID *) Pe32Data);
if (PdbPointer != NULL) { if (PdbPointer != NULL) {
DEBUG ((EFI_D_ERROR, " in module (%a)", PdbPointer)); DEBUG ((DEBUG_ERROR, " in module (%a)\n", PdbPointer));
} }
} }
} }

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@ -694,8 +694,8 @@ SmmRelocateBases (
VOID VOID
EFIAPI EFIAPI
SmiPFHandler ( SmiPFHandler (
IN EFI_EXCEPTION_TYPE InterruptType, IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_SYSTEM_CONTEXT SystemContext IN EFI_SYSTEM_CONTEXT SystemContext
); );
/** /**

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@ -1,7 +1,7 @@
/** @file /** @file
SMM profile internal header file. SMM profile internal header file.
Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR> Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -41,10 +41,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
// Please disable it. // Please disable it.
// //
#define IA32_PF_EC_P (1u << 0)
#define IA32_PF_EC_WR (1u << 1)
#define IA32_PF_EC_US (1u << 2)
#define IA32_PF_EC_RSVD (1u << 3)
#define IA32_PF_EC_ID (1u << 4) #define IA32_PF_EC_ID (1u << 4)
#define SMM_PROFILE_NAME L"SmmProfileData" #define SMM_PROFILE_NAME L"SmmProfileData"

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@ -1,7 +1,7 @@
/** @file /** @file
Page Fault (#PF) handler for X64 processors Page Fault (#PF) handler for X64 processors
Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR> Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR> Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
@ -802,8 +802,8 @@ SmiDefaultPFHandler (
VOID VOID
EFIAPI EFIAPI
SmiPFHandler ( SmiPFHandler (
IN EFI_EXCEPTION_TYPE InterruptType, IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_SYSTEM_CONTEXT SystemContext IN EFI_SYSTEM_CONTEXT SystemContext
) )
{ {
UINTN PFAddress; UINTN PFAddress;
@ -817,6 +817,7 @@ SmiPFHandler (
PFAddress = AsmReadCr2 (); PFAddress = AsmReadCr2 ();
if (mCpuSmmStaticPageTable && (PFAddress >= LShiftU64 (1, (mPhysicalAddressBits - 1)))) { if (mCpuSmmStaticPageTable && (PFAddress >= LShiftU64 (1, (mPhysicalAddressBits - 1)))) {
DumpCpuContext (InterruptType, SystemContext);
DEBUG ((DEBUG_ERROR, "Do not support address 0x%lx by processor!\n", PFAddress)); DEBUG ((DEBUG_ERROR, "Do not support address 0x%lx by processor!\n", PFAddress));
CpuDeadLoop (); CpuDeadLoop ();
} }
@ -827,6 +828,7 @@ SmiPFHandler (
// //
if ((PFAddress >= mCpuHotPlugData.SmrrBase) && if ((PFAddress >= mCpuHotPlugData.SmrrBase) &&
(PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize))) { (PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize))) {
DumpCpuContext (InterruptType, SystemContext);
CpuIndex = GetCpuIndex (); CpuIndex = GetCpuIndex ();
GuardPageAddress = (mSmmStackArrayBase + EFI_PAGE_SIZE + CpuIndex * mSmmStackSize); GuardPageAddress = (mSmmStackArrayBase + EFI_PAGE_SIZE + CpuIndex * mSmmStackSize);
if ((FeaturePcdGet (PcdCpuSmmStackGuard)) && if ((FeaturePcdGet (PcdCpuSmmStackGuard)) &&
@ -834,15 +836,6 @@ SmiPFHandler (
(PFAddress < (GuardPageAddress + EFI_PAGE_SIZE))) { (PFAddress < (GuardPageAddress + EFI_PAGE_SIZE))) {
DEBUG ((DEBUG_ERROR, "SMM stack overflow!\n")); DEBUG ((DEBUG_ERROR, "SMM stack overflow!\n"));
} else { } else {
DEBUG ((DEBUG_ERROR, "SMM exception data - 0x%lx(", SystemContext.SystemContextX64->ExceptionData));
DEBUG ((DEBUG_ERROR, "I:%x, R:%x, U:%x, W:%x, P:%x",
(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0,
(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_RSVD) != 0,
(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_US) != 0,
(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_WR) != 0,
(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_P) != 0
));
DEBUG ((DEBUG_ERROR, ")\n"));
if ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0) { if ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0) {
DEBUG ((DEBUG_ERROR, "SMM exception at execution (0x%lx)\n", PFAddress)); DEBUG ((DEBUG_ERROR, "SMM exception at execution (0x%lx)\n", PFAddress));
DEBUG_CODE ( DEBUG_CODE (
@ -863,6 +856,7 @@ SmiPFHandler (
// //
if ((PFAddress < mCpuHotPlugData.SmrrBase) || if ((PFAddress < mCpuHotPlugData.SmrrBase) ||
(PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) { (PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) {
DumpCpuContext (InterruptType, SystemContext);
if ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0) { if ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0) {
DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%lx) out of SMM range after SMM is locked!\n", PFAddress)); DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%lx) out of SMM range after SMM is locked!\n", PFAddress));
DEBUG_CODE ( DEBUG_CODE (