mirror of https://github.com/acidanthera/audk.git
ArmPkg: Correct small typos
The 'cspell' CI test detected some small typos in ArmPkg. Correct them. Cc: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
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@ -121,7 +121,7 @@ GicV2GetInterruptSourceState (
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@param This Instance pointer for this protocol
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@param Source Hardware source of the interrupt
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@retval EFI_SUCCESS Source interrupt EOI'ed.
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@retval EFI_SUCCESS Source interrupt ended successfully.
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@retval EFI_UNSUPPORTED Source interrupt is not supported
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**/
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@ -115,7 +115,7 @@ GicV3GetInterruptSourceState (
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@param This Instance pointer for this protocol
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@param Source Hardware source of the interrupt
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@retval EFI_SUCCESS Source interrupt EOI'ed.
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@retval EFI_SUCCESS Source interrupt ended successfully.
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@retval EFI_DEVICE_ERROR Hardware could not be programmed.
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**/
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@ -345,7 +345,7 @@ EfiAttributeToArmAttribute (
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break;
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case EFI_MEMORY_WC:
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// Map to normal non-cachable
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// Map to normal non-cacheable
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ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
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break;
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@ -51,7 +51,7 @@ EFI_FILE gSemihostFsFile = {
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};
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//
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// Device path for semi-hosting. It contains our autogened Caller ID GUID.
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// Device path for semi-hosting. It contains our auto-generated Caller ID GUID.
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//
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typedef struct {
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VENDOR_DEVICE_PATH Guid;
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@ -124,7 +124,7 @@ UpdatePageEntries (
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} else if ((Attributes & EFI_MEMORY_WC) != 0) {
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// modify cacheability attributes
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EntryMask |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK;
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// map to normal non-cachable
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// map to normal non-cacheable
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EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
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} else if ((Attributes & EFI_MEMORY_WT) != 0) {
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// modify cacheability attributes
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@ -254,7 +254,7 @@ UpdateSectionEntries (
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} else if ((Attributes & EFI_MEMORY_WC) != 0) {
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// modify cacheability attributes
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EntryMask |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK;
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// map to normal non-cachable
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// map to normal non-cacheable
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EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
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} else if ((Attributes & EFI_MEMORY_WT) != 0) {
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// modify cacheability attributes
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@ -37,11 +37,11 @@ SerialPortInitialize (
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/**
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Write data to serial device.
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@param Buffer Point of data buffer which need to be writed.
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@param Buffer Point of data buffer which need to be written.
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@param NumberOfBytes Number of output bytes which are cached in Buffer.
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@retval 0 Write data failed.
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@retval !0 Actual number of bytes writed to serial device.
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@retval !0 Actual number of bytes written to serial device.
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**/
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@ -103,7 +103,7 @@ SerialPortWrite (
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/**
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Read data from serial device and save the datas in buffer.
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@param Buffer Point of data buffer which need to be writed.
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@param Buffer Point of data buffer which need to be written.
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@param NumberOfBytes Number of output bytes which are cached in Buffer.
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@retval 0 Read data failed.
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@ -102,7 +102,7 @@ SendMemoryPermissionRequest (
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// Check error response from Callee.
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if ((*RetVal & BIT31) != 0) {
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// Bit 31 set means there is an error retured
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// Bit 31 set means there is an error returned
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// See [1], Section 13.5.5.1 MM_SP_MEMORY_ATTRIBUTES_GET_AARCH64 and
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// Section 13.5.5.2 MM_SP_MEMORY_ATTRIBUTES_SET_AARCH64.
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switch (*RetVal) {
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@ -24,7 +24,7 @@
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Get next language from language code list (with separator ';').
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@param LangCode Input: point to first language in the list. On
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Otput: point to next language in the list, or
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Output: point to next language in the list, or
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NULL if no more language in the list.
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@param Lang The first language in the list.
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