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UefiCpuPkg/MtrrLib: Add MtrrLib prefix to several internal functions 

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
This commit is contained in:
Ruiyu Ni 2016-09-02 10:45:53 +08:00
parent 94240f1b05
commit b8f015999e
1 changed files with 15 additions and 15 deletions
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30
UefiCpuPkg/Library/MtrrLib/MtrrLib.c
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@ -243,7 +243,7 @@ MtrrGetDefaultMemoryType (
**/ **/
VOID VOID
PreMtrrChange ( MtrrLibPreMtrrChange (
OUT MTRR_CONTEXT *MtrrContext OUT MTRR_CONTEXT *MtrrContext
) )
{ {
@ -284,7 +284,7 @@ PreMtrrChange (
**/ **/
VOID VOID
PostMtrrChangeEnableCache ( MtrrLibPostMtrrChangeEnableCache (
IN MTRR_CONTEXT *MtrrContext IN MTRR_CONTEXT *MtrrContext
) )
{ {
@ -319,7 +319,7 @@ PostMtrrChangeEnableCache (
**/ **/
VOID VOID
PostMtrrChange ( MtrrLibPostMtrrChange (
IN MTRR_CONTEXT *MtrrContext IN MTRR_CONTEXT *MtrrContext
) )
{ {
@ -328,7 +328,7 @@ PostMtrrChange (
// //
AsmMsrBitFieldWrite64 (MTRR_LIB_IA32_MTRR_DEF_TYPE, 10, 11, 3); AsmMsrBitFieldWrite64 (MTRR_LIB_IA32_MTRR_DEF_TYPE, 10, 11, 3);
PostMtrrChangeEnableCache (MtrrContext); MtrrLibPostMtrrChangeEnableCache (MtrrContext);
} }
/** /**
@ -1086,7 +1086,7 @@ MtrrLibInitializeMtrrMask (
**/ **/
UINT64 UINT64
MtrrPrecedence ( MtrrLibPrecedence (
IN UINT64 MtrrType1, IN UINT64 MtrrType1,
IN UINT64 MtrrType2 IN UINT64 MtrrType2
) )
@ -1245,7 +1245,7 @@ MtrrGetMemoryAttributeByAddressWorker (
if (Address >= VariableMtrr[Index].BaseAddress && if (Address >= VariableMtrr[Index].BaseAddress &&
Address < VariableMtrr[Index].BaseAddress+VariableMtrr[Index].Length) { Address < VariableMtrr[Index].BaseAddress+VariableMtrr[Index].Length) {
TempMtrrType = VariableMtrr[Index].Type; TempMtrrType = VariableMtrr[Index].Type;
MtrrType = MtrrPrecedence (MtrrType, TempMtrrType); MtrrType = MtrrLibPrecedence (MtrrType, TempMtrrType);
} }
} }
} }
@ -1791,7 +1791,7 @@ Done:
for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) { for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
if (FixedSettingsModified[Index]) { if (FixedSettingsModified[Index]) {
if (!MtrrContextValid) { if (!MtrrContextValid) {
PreMtrrChange (&MtrrContext); MtrrLibPreMtrrChange (&MtrrContext);
MtrrContextValid = TRUE; MtrrContextValid = TRUE;
} }
AsmWriteMsr64 ( AsmWriteMsr64 (
@ -1809,7 +1809,7 @@ Done:
if (WorkingVariableSettings.Mtrr[Index].Base != OriginalVariableSettings.Mtrr[Index].Base || if (WorkingVariableSettings.Mtrr[Index].Base != OriginalVariableSettings.Mtrr[Index].Base ||
WorkingVariableSettings.Mtrr[Index].Mask != OriginalVariableSettings.Mtrr[Index].Mask ) { WorkingVariableSettings.Mtrr[Index].Mask != OriginalVariableSettings.Mtrr[Index].Mask ) {
if (!MtrrContextValid) { if (!MtrrContextValid) {
PreMtrrChange (&MtrrContext); MtrrLibPreMtrrChange (&MtrrContext);
MtrrContextValid = TRUE; MtrrContextValid = TRUE;
} }
AsmWriteMsr64 ( AsmWriteMsr64 (
@ -1824,7 +1824,7 @@ Done:
} }
} }
if (MtrrContextValid) { if (MtrrContextValid) {
PostMtrrChange (&MtrrContext); MtrrLibPostMtrrChange (&MtrrContext);
} }
DEBUG((DEBUG_CACHE, " Status = %r\n", Status)); DEBUG((DEBUG_CACHE, " Status = %r\n", Status));
@ -1971,9 +1971,9 @@ MtrrSetVariableMtrr (
return VariableSettings; return VariableSettings;
} }
PreMtrrChange (&MtrrContext); MtrrLibPreMtrrChange (&MtrrContext);
MtrrSetVariableMtrrWorker (VariableSettings); MtrrSetVariableMtrrWorker (VariableSettings);
PostMtrrChange (&MtrrContext); MtrrLibPostMtrrChange (&MtrrContext);
MtrrDebugPrintAllMtrrs (); MtrrDebugPrintAllMtrrs ();
return VariableSettings; return VariableSettings;
@ -2021,9 +2021,9 @@ MtrrSetFixedMtrr (
return FixedSettings; return FixedSettings;
} }
PreMtrrChange (&MtrrContext); MtrrLibPreMtrrChange (&MtrrContext);
MtrrSetFixedMtrrWorker (FixedSettings); MtrrSetFixedMtrrWorker (FixedSettings);
PostMtrrChange (&MtrrContext); MtrrLibPostMtrrChange (&MtrrContext);
MtrrDebugPrintAllMtrrs (); MtrrDebugPrintAllMtrrs ();
return FixedSettings; return FixedSettings;
@ -2091,7 +2091,7 @@ MtrrSetAllMtrrs (
return MtrrSetting; return MtrrSetting;
} }
PreMtrrChange (&MtrrContext); MtrrLibPreMtrrChange (&MtrrContext);
// //
// Set fixed MTRRs // Set fixed MTRRs
@ -2108,7 +2108,7 @@ MtrrSetAllMtrrs (
// //
AsmWriteMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE, MtrrSetting->MtrrDefType); AsmWriteMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE, MtrrSetting->MtrrDefType);
PostMtrrChangeEnableCache (&MtrrContext); MtrrLibPostMtrrChangeEnableCache (&MtrrContext);
return MtrrSetting; return MtrrSetting;
} }