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UefiCpuPkg/ExceptionHandlerAsm.S: Fix code length issue with GCC 5.4 

X64\ExceptionHandlerAsm.S define MARCO to set up 32 IDT entries header.
It assume GCC compiler will generate the same code length on the following
instrction for each IDT entry.
  jmp    ASM_PFX(CommonInterruptEntry)

It works with GCC 4.x. However, GCC 5.4 will generate different code size of IDT
entry code per the offset value from CommonInterruptEntry address. We should use
DB to make sure each IDT entry header has the same size whatever compiler
version.

.ASM and .nasm used the different solution and do not have this issue.

https://bugzilla.tianocore.org/show_bug.cgi?id=389

Cc: Liming Gao <liming.gao@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
Jeff Fan 2017-02-21 11:29:45 +08:00
parent e0307a7dad
commit b9d56d0b93
1 changed files with 3 additions and 2 deletions
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5
UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S
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@ -1,5 +1,5 @@
#------------------------------------------------------------------------------ ;
# Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@ -36,7 +36,8 @@ ASM_GLOBAL ASM_PFX(CommonExceptionHandler)
.macro IDT_MACRO arg
push \arg
#endif
jmp ASM_PFX(CommonInterruptEntry)
.byte 0xe9 # jmp ASM_PFX(CommonInterruptEntry)
.long ASM_PFX(CommonInterruptEntry) - . - 4
.endm
AsmIdtVectorBegin: