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IntelFspPkg: correct comments and rename a label 

Corrects a word typo and a comment error.
Rename a label to match its function name.
 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Yao Jiewen <Jiewen.Yao@intel.com>
Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17553 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Guo Dong 2015-06-03 04:55:58 +00:00 committed by gdong1
parent 5149242280
commit baae777b8e
3 changed files with 7 additions and 7 deletions
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10
IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
View File

@ -368,15 +368,15 @@ TempRamInitApi PROC NEAR PUBLIC
mov eax, dword ptr [esp + 4] mov eax, dword ptr [esp + 4]
cmp eax, 0 cmp eax, 0
mov eax, 80000002h mov eax, 80000002h
jz NemInitExit jz TempRamInitExit
; ;
; Sec Platform Init ; Sec Platform Init
; ;
CALL_MMX SecPlatformInit CALL_MMX SecPlatformInit
cmp eax, 0 cmp eax, 0
jnz NemInitExit jnz TempRamInitExit
; Load microcode ; Load microcode
LOAD_ESP LOAD_ESP
CALL_MMX LoadMicrocode CALL_MMX LoadMicrocode
@ -387,14 +387,14 @@ TempRamInitApi PROC NEAR PUBLIC
LOAD_ESP LOAD_ESP
CALL_MMX SecCarInit CALL_MMX SecCarInit
cmp eax, 0 cmp eax, 0
jnz NemInitExit jnz TempRamInitExit
LOAD_ESP LOAD_ESP
CALL_MMX EstablishStackFsp CALL_MMX EstablishStackFsp
LXMMN xmm6, eax, 3 ;Restore microcode status if no CAR init error from ECX-SLOT 3 in xmm6. LXMMN xmm6, eax, 3 ;Restore microcode status if no CAR init error from ECX-SLOT 3 in xmm6.
NemInitExit: TempRamInitExit:
; ;
; Load EBP, EBX, ESI, EDI & ESP from XMM7 & XMM6 ; Load EBP, EBX, ESI, EDI & ESP from XMM7 & XMM6
; ;

2
IntelFspPkg/FspSecCore/SecMain.c
View File

@ -104,7 +104,7 @@ SecStartup (
AsmWriteIdtr (&IdtDescriptor); AsmWriteIdtr (&IdtDescriptor);
// //
// Iniitalize the global FSP data region // Initialize the global FSP data region
// //
FspGlobalDataInit (&PeiFspData, BootLoaderStack, (UINT8)ApiIdx); FspGlobalDataInit (&PeiFspData, BootLoaderStack, (UINT8)ApiIdx);

2
IntelFspPkg/Library/BaseCacheLib/CacheLib.c
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@ -45,7 +45,7 @@ SearchForExactMtrr (
@param[in] MemoryCacheType input cache type to be checked. @param[in] MemoryCacheType input cache type to be checked.
@retval TRUE MemoryCacheType is default MTRR setting. @retval TRUE MemoryCacheType is default MTRR setting.
@retval TRUE MemoryCacheType is NOT default MTRR setting. @retval FALSE MemoryCacheType is NOT default MTRR setting.
**/ **/
BOOLEAN BOOLEAN
IsDefaultType ( IsDefaultType (