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ArmPlatformPkg/PL180MciDxe: Increased the TPL at the highest priority to disable interrupts
This change prevent any interrupt to disturb the PL180 data transfer. If the data transfer is not fast enough, we get UNDERRUN error. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14526 6f19259b-4bc3-4df7-8a09-765794883524
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@ -217,12 +217,17 @@ MciReadBlockData (
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UINTN Status;
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UINTN Status;
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EFI_STATUS RetVal;
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EFI_STATUS RetVal;
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UINTN DataCtrlReg;
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UINTN DataCtrlReg;
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EFI_TPL Tpl;
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RetVal = EFI_SUCCESS;
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RetVal = EFI_SUCCESS;
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// Read data from the RX FIFO
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// Read data from the RX FIFO
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Loop = 0;
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Loop = 0;
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Finish = MMCI0_BLOCKLEN / 4;
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Finish = MMCI0_BLOCKLEN / 4;
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// Raise the TPL at the highest level to disable Interrupts.
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Tpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
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do {
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do {
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// Read the Status flags
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// Read the Status flags
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Status = MmioRead32 (MCI_STATUS_REG);
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Status = MmioRead32 (MCI_STATUS_REG);
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@ -270,6 +275,9 @@ MciReadBlockData (
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}
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}
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} while ((Loop < Finish));
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} while ((Loop < Finish));
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// Restore Tpl
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gBS->RestoreTPL (Tpl);
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// Clear Status flags
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// Clear Status flags
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MmioWrite32 (MCI_CLEAR_STATUS_REG, MCI_CLR_ALL_STATUS);
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MmioWrite32 (MCI_CLEAR_STATUS_REG, MCI_CLR_ALL_STATUS);
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@ -294,6 +302,7 @@ MciWriteBlockData (
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UINTN Status;
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UINTN Status;
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EFI_STATUS RetVal;
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EFI_STATUS RetVal;
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UINTN DataCtrlReg;
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UINTN DataCtrlReg;
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EFI_TPL Tpl;
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RetVal = EFI_SUCCESS;
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RetVal = EFI_SUCCESS;
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@ -301,6 +310,10 @@ MciWriteBlockData (
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Loop = 0;
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Loop = 0;
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Finish = MMCI0_BLOCKLEN / 4;
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Finish = MMCI0_BLOCKLEN / 4;
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Timer = MMCI0_TIMEOUT * 100;
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Timer = MMCI0_TIMEOUT * 100;
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// Raise the TPL at the highest level to disable Interrupts.
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Tpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
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do {
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do {
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// Read the Status flags
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// Read the Status flags
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Status = MmioRead32 (MCI_STATUS_REG);
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Status = MmioRead32 (MCI_STATUS_REG);
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@ -345,6 +358,9 @@ MciWriteBlockData (
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}
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}
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} while (Loop < Finish);
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} while (Loop < Finish);
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// Restore Tpl
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gBS->RestoreTPL (Tpl);
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// Wait for FIFO to drain
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// Wait for FIFO to drain
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Timer = MMCI0_TIMEOUT * 60;
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Timer = MMCI0_TIMEOUT * 60;
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Status = MmioRead32 (MCI_STATUS_REG);
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Status = MmioRead32 (MCI_STATUS_REG);
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