mirror of https://github.com/acidanthera/audk.git
Clean up using FIQ as ctrl-c checker so you can break in from the debugger.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10390 6f19259b-4bc3-4df7-8a09-765794883524
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@ -94,7 +94,7 @@ ASM_PFX(Fiq):
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ASM_PFX(UndefinedInstructionEntry):
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ASM_PFX(UndefinedInstructionEntry):
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sub LR, LR, #4 @ Only -2 for Thumb, adjust in CommonExceptionEntry
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sub LR, LR, #4 @ Only -2 for Thumb, adjust in CommonExceptionEntry
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srsdb #0x13! @ Store return state on SVC stack
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srsdb #0x13! @ Store return state on SVC stack
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cps #0x13 @ Switch to SVC for common stack
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cpsid f,#0x13 @ Switch to SVC for common stack
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stmfd SP!,{LR} @ Store the link register for the current mode
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stmfd SP!,{LR} @ Store the link register for the current mode
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sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
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sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
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stmfd SP!,{R0-R12} @ Store the register state
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stmfd SP!,{R0-R12} @ Store the register state
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@ -106,7 +106,7 @@ ASM_PFX(UndefinedInstructionEntry):
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ASM_PFX(SoftwareInterruptEntry):
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ASM_PFX(SoftwareInterruptEntry):
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sub LR, LR, #4 @ Only -2 for Thumb, adjust in CommonExceptionEntry
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sub LR, LR, #4 @ Only -2 for Thumb, adjust in CommonExceptionEntry
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srsdb #0x13! @ Store return state on SVC stack
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srsdb #0x13! @ Store return state on SVC stack
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@ We are already in SVC mode
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cpsid f @ We are already in SVC mode
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stmfd SP!,{LR} @ Store the link register for the current mode
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stmfd SP!,{LR} @ Store the link register for the current mode
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sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
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sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
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stmfd SP!,{R0-R12} @ Store the register state
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stmfd SP!,{R0-R12} @ Store the register state
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@ -118,7 +118,7 @@ ASM_PFX(SoftwareInterruptEntry):
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ASM_PFX(PrefetchAbortEntry):
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ASM_PFX(PrefetchAbortEntry):
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sub LR,LR,#4
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sub LR,LR,#4
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srsdb #0x13! @ Store return state on SVC stack
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srsdb #0x13! @ Store return state on SVC stack
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cps #0x13 @ Switch to SVC for common stack
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cpsid f,#0x13 @ Switch to SVC for common stack
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stmfd SP!,{LR} @ Store the link register for the current mode
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stmfd SP!,{LR} @ Store the link register for the current mode
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sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
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sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
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stmfd SP!,{R0-R12} @ Store the register state
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stmfd SP!,{R0-R12} @ Store the register state
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@ -130,7 +130,7 @@ ASM_PFX(PrefetchAbortEntry):
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ASM_PFX(DataAbortEntry):
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ASM_PFX(DataAbortEntry):
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sub LR,LR,#8
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sub LR,LR,#8
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srsdb #0x13! @ Store return state on SVC stack
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srsdb #0x13! @ Store return state on SVC stack
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cps #0x13 @ Switch to SVC for common stack
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cpsid f,#0x13 @ Switch to SVC for common stack
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stmfd SP!,{LR} @ Store the link register for the current mode
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stmfd SP!,{LR} @ Store the link register for the current mode
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sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
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sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
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stmfd SP!,{R0-R12} @ Store the register state
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stmfd SP!,{R0-R12} @ Store the register state
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@ -141,7 +141,7 @@ ASM_PFX(DataAbortEntry):
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ASM_PFX(ReservedExceptionEntry):
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ASM_PFX(ReservedExceptionEntry):
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srsdb #0x13! @ Store return state on SVC stack
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srsdb #0x13! @ Store return state on SVC stack
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cps #0x13 @ Switch to SVC for common stack
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cpsid f,#0x13 @ Switch to SVC for common stack
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stmfd SP!,{LR} @ Store the link register for the current mode
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stmfd SP!,{LR} @ Store the link register for the current mode
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sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
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sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR
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stmfd SP!,{R0-R12} @ Store the register state
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stmfd SP!,{R0-R12} @ Store the register state
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@ -95,7 +95,7 @@ Fiq
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UndefinedInstructionEntry
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UndefinedInstructionEntry
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sub LR, LR, #4 ; Only -2 for Thumb, adjust in CommonExceptionEntry
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sub LR, LR, #4 ; Only -2 for Thumb, adjust in CommonExceptionEntry
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srsfd #0x13! ; Store return state on SVC stack
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srsfd #0x13! ; Store return state on SVC stack
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cps #0x13 ; Switch to SVC for common stack
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cpsid f, #0x13 ; Switch to SVC for common stack
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stmfd SP!,{LR} ; Store the link register for the current mode
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stmfd SP!,{LR} ; Store the link register for the current mode
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sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
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sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
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stmfd SP!,{R0-R12} ; Store the register state
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stmfd SP!,{R0-R12} ; Store the register state
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@ -107,7 +107,7 @@ UndefinedInstructionEntry
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SoftwareInterruptEntry
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SoftwareInterruptEntry
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sub LR, LR, #4 ; Only -2 for Thumb, adjust in CommonExceptionEntry
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sub LR, LR, #4 ; Only -2 for Thumb, adjust in CommonExceptionEntry
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srsfd #0x13! ; Store return state on SVC stack
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srsfd #0x13! ; Store return state on SVC stack
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; We are already in SVC mode
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cpsid f ; We are already in SVC mode
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stmfd SP!,{LR} ; Store the link register for the current mode
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stmfd SP!,{LR} ; Store the link register for the current mode
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sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
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sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
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stmfd SP!,{R0-R12} ; Store the register state
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stmfd SP!,{R0-R12} ; Store the register state
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@ -119,7 +119,7 @@ SoftwareInterruptEntry
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PrefetchAbortEntry
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PrefetchAbortEntry
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sub LR,LR,#4
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sub LR,LR,#4
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srsfd #0x13! ; Store return state on SVC stack
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srsfd #0x13! ; Store return state on SVC stack
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cps #0x13 ; Switch to SVC for common stack
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cpsid f, #0x13 ; Switch to SVC for common stack
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stmfd SP!,{LR} ; Store the link register for the current mode
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stmfd SP!,{LR} ; Store the link register for the current mode
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sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
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sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
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stmfd SP!,{R0-R12} ; Store the register state
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stmfd SP!,{R0-R12} ; Store the register state
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@ -131,7 +131,7 @@ PrefetchAbortEntry
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DataAbortEntry
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DataAbortEntry
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sub LR,LR,#8
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sub LR,LR,#8
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srsfd #0x13! ; Store return state on SVC stack
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srsfd #0x13! ; Store return state on SVC stack
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cps #0x13 ; Switch to SVC for common stack
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cpsid f, #0x13 ; Switch to SVC for common stack
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stmfd SP!,{LR} ; Store the link register for the current mode
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stmfd SP!,{LR} ; Store the link register for the current mode
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sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
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sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
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stmfd SP!,{R0-R12} ; Store the register state
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stmfd SP!,{R0-R12} ; Store the register state
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@ -142,7 +142,7 @@ DataAbortEntry
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ReservedExceptionEntry
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ReservedExceptionEntry
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srsfd #0x13! ; Store return state on SVC stack
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srsfd #0x13! ; Store return state on SVC stack
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cps #0x13 ; Switch to SVC for common stack
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cpsid f, #0x13 ; Switch to SVC for common stack
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stmfd SP!,{LR} ; Store the link register for the current mode
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stmfd SP!,{LR} ; Store the link register for the current mode
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sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
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sub SP,SP,#0x20 ; Save space for SP, LR, PC, IFAR - CPSR
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stmfd SP!,{R0-R12} ; Store the register state
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stmfd SP!,{R0-R12} ; Store the register state
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@ -466,6 +466,33 @@ ProcessorSendTSignal (
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*TSignalPtr = '\0';
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*TSignalPtr = '\0';
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}
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}
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/**
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FIQ state is only changed by FIQ exception. We don't want to take FIQ
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ticks in the GDB stub. The stub disables FIQ on entry, but this is the
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third instruction that executes in the execption handler. Thus we have
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a crack we need to test for.
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@param PC PC of execption
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@return TRUE We are in the GDB stub exception preamble
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@return FALSE We are not in GDB stub code
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**/
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BOOLEAN
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InFiqCrack (
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IN UINT32 PC
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)
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{
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UINT32 VectorBase = PcdGet32 (PcdCpuVectorBaseAddress);
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UINT32 Length = (UINTN)ExceptionHandlersEnd - (UINTN)ExceptionHandlersStart;
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if ((PC >= VectorBase) && (PC <= (VectorBase + Length))) {
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return TRUE;
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}
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return FALSE;
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}
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/**
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/**
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Check to see if this exception is related to ctrl-c handling.
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Check to see if this exception is related to ctrl-c handling.
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@ -486,6 +513,7 @@ ProcessorControlC (
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IN OUT EFI_SYSTEM_CONTEXT SystemContext
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IN OUT EFI_SYSTEM_CONTEXT SystemContext
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)
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)
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{
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{
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CHAR8 Char;
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BOOLEAN Return = TRUE;
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BOOLEAN Return = TRUE;
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if (ExceptionType != EXCEPT_ARM_FIQ) {
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if (ExceptionType != EXCEPT_ARM_FIQ) {
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@ -493,6 +521,12 @@ ProcessorControlC (
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return FALSE;
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return FALSE;
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}
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}
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if (InFiqCrack (SystemContext.SystemContextArm->PC)) {
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// We are in our own interrupt preable, so skip this tick.
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// We never want to let gdb see the debug stub running if we can help it
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return FALSE;
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}
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while (TRUE) {
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while (TRUE) {
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if (!GdbIsCharAvailable ()) {
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if (!GdbIsCharAvailable ()) {
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//
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//
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@ -502,7 +536,8 @@ ProcessorControlC (
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break;
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break;
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}
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}
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if (GdbGetChar () == 0x03) {
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Char = GdbGetChar ();
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if (Char == 0x03) {
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//
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//
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// We have a ctrl-c so exit and process exception for ctrl-c
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// We have a ctrl-c so exit and process exception for ctrl-c
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//
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//
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@ -527,7 +562,8 @@ ProcessorControlC (
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@param[in] EnableStatus Enable/Disable.
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@param[in] EnableStatus Enable/Disable.
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@return FALSE always.
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@retval TRUE Debug timer interrupt were enabled on entry to this call.
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@retval FALSE Debug timer interrupt were disabled on entry to this call.
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**/
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**/
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BOOLEAN
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BOOLEAN
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@ -541,7 +577,7 @@ SaveAndSetDebugTimerInterrupt (
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FiqEnabled = ArmGetFiqState ();
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FiqEnabled = ArmGetFiqState ();
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if (EnableStatus) {
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if (EnableStatus) {
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DebugAgentTimerSetPeriod (100);
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DebugAgentTimerSetPeriod (PcdGet32 (PcdGdbTimerPeriodMilliseconds));
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ArmEnableFiq ();
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ArmEnableFiq ();
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} else {
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} else {
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DebugAgentTimerSetPeriod (0);
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DebugAgentTimerSetPeriod (0);
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@ -551,6 +587,8 @@ SaveAndSetDebugTimerInterrupt (
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return FiqEnabled;
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return FiqEnabled;
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}
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}
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VOID
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VOID
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GdbFPutString (
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GdbFPutString (
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IN CHAR8 *String
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IN CHAR8 *String
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@ -575,21 +613,14 @@ InitializeDebugAgent (
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UINTN Offset;
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UINTN Offset;
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UINTN Length;
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UINTN Length;
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BOOLEAN IrqEnabled;
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BOOLEAN IrqEnabled;
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BOOLEAN FiqEnabled;
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UINT32 *VectorBase;
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UINT32 *VectorBase;
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//
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//
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// Disable interrupts
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// Disable interrupts
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//
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//
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IrqEnabled = ArmGetInterruptState ();
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IrqEnabled = ArmGetInterruptState ();
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ArmDisableInterrupts ();
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ArmDisableInterrupts ();
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//
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// EFI does not use the FIQ, but a debugger might so we must disable
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// as we take over the exception vectors.
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//
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FiqEnabled = ArmGetFiqState ();
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ArmDisableFiq ();
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ArmDisableFiq ();
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//
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//
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@ -615,12 +646,9 @@ InitializeDebugAgent (
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// Flush Caches since we updated executable stuff
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// Flush Caches since we updated executable stuff
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InvalidateInstructionCacheRange ((VOID *)PcdGet32(PcdCpuVectorBaseAddress), Length);
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InvalidateInstructionCacheRange ((VOID *)PcdGet32(PcdCpuVectorBaseAddress), Length);
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// setup a timer so gdb can break in via ctrl-c
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DebugAgentTimerIntialize ();
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DebugAgentTimerIntialize ();
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if (FiqEnabled) {
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ArmEnableFiq ();
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}
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if (IrqEnabled) {
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if (IrqEnabled) {
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ArmEnableInterrupts ();
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ArmEnableInterrupts ();
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}
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}
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@ -64,6 +64,7 @@
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[FixedPcd.common]
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[FixedPcd.common]
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gEmbeddedTokenSpaceGuid.PcdGdbMaxPacketRetryCount
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gEmbeddedTokenSpaceGuid.PcdGdbMaxPacketRetryCount
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gEmbeddedTokenSpaceGuid.PcdGdbTimerPeriodMilliseconds
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[FixedPcd.arm]
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[FixedPcd.arm]
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gArmTokenSpaceGuid.PcdCpuVectorBaseAddress
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gArmTokenSpaceGuid.PcdCpuVectorBaseAddress
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