mirror of https://github.com/acidanthera/audk.git
ArmPkg/ArmLib: rename AArch64 variant of ArmReadIdPfr0
ArmReadIdPfr0 is now used only inside ArmLib. Rename the AArch64 variant ArmReadIdAA64Pfr0 and add a declaration of that only into local header AArch64/AArch64Lib.h. Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
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@ -85,5 +85,5 @@ ArmHasGicSystemRegisters (
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VOID
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)
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{
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return ((ArmReadIdPfr0 () & AARCH64_PFR0_GIC) != 0);
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return ((ArmReadIdAA64Pfr0 () & AARCH64_PFR0_GIC) != 0);
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}
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@ -2,6 +2,7 @@
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
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Copyright (c) 2020, NUVIA Inc. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@ -35,5 +36,10 @@ ArmCleanInvalidateDataCacheEntryBySetWay (
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IN UINTN SetWayFormat
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);
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UINTN
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EFIAPI
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ArmReadIdAA64Pfr0 (
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VOID
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);
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#endif // __AARCH64_LIB_H__
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@ -3,6 +3,7 @@
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# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
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# Copyright (c) 2011 - 2017, ARM Limited. All rights reserved.
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# Copyright (c) 2016, Linaro Limited. All rights reserved.
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# Copyright (c) 2020, NUVIA Inc. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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@ -395,7 +396,7 @@ ASM_FUNC(ArmReadVBar)
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ASM_FUNC(ArmEnableVFP)
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// Check whether floating-point is implemented in the processor.
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mov x1, x30 // Save LR
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bl ArmReadIdPfr0 // Read EL1 Processor Feature Register (PFR0)
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bl ArmReadIdAA64Pfr0 // Read EL1 Processor Feature Register (PFR0)
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mov x30, x1 // Restore LR
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ubfx x0, x0, #16, #4 // Extract the FP bits 16:19
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cmp x0, #0xF // Check if FP bits are '1111b',
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@ -448,7 +449,7 @@ ASM_FUNC(ArmIsArchTimerImplemented)
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ret
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ASM_FUNC(ArmReadIdPfr0)
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ASM_FUNC(ArmReadIdAA64Pfr0)
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mrs x0, id_aa64pfr0_el1 // Read ID_AA64PFR0 Register
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ret
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