mirror of https://github.com/acidanthera/audk.git
Adding files from OvmfPkg to common location. This is so multiple packages can use pre-built reset vector code.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9911 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
geekboy15a
parent
0bf47d3ddf
commit
bc252e8ea4
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#/** @file
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# Reset Vector binary
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#
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# Copyright (c) 2006 - 2009, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#**/
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = ResetVector
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FILE_GUID = 1BA0062E-C779-4582-8566-336AE8F78F09
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MODULE_TYPE = SEC
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VERSION_STRING = 1.1
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EDK_RELEASE_VERSION = 0x00020000
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EFI_SPECIFICATION_VERSION = 0x00020000
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#
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# The following information is for reference only and not required by the build tools.
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#
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# VALID_ARCHITECTURES = IA32 X64
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#
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[Binaries.Ia32]
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RAW|ResetVector.ia32.raw|*
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[Binaries.X64]
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RAW|ResetVector.x64.raw|*
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## @file
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# Automate the process of building the various reset vector types
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#
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# Copyright (c) 2009, Intel Corporation
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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import glob
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import os
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import subprocess
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import sys
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def RunCommand(commandLine):
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#print ' '.join(commandLine)
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return subprocess.call(commandLine)
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for filename in glob.glob(os.path.join('Bin', '*.raw')):
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os.remove(filename)
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for arch in ('ia32', 'x64'):
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for debugType in (None, 'port80', 'serial'):
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output = os.path.join('Bin', 'ResetVector')
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output += '.' + arch
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if debugType is not None:
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output += '.' + debugType
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output += '.raw'
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commandLine = (
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'nasm',
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'-D', 'ARCH_%s' % arch.upper(),
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'-D', 'DEBUG_%s' % str(debugType).upper(),
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'-o', output,
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'ResetVectorCode.asm',
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)
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ret = RunCommand(commandLine)
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print '\tASM\t' + output
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if ret != 0: sys.exit(ret)
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commandLine = (
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'python',
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'Tools/FixupForRawSection.py',
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output,
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)
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print '\tFIXUP\t' + output
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ret = RunCommand(commandLine)
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if ret != 0: sys.exit(ret)
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;------------------------------------------------------------------------------
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; @file
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; Common macros used in the ResetVector VTF module.
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;
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; Copyright (c) 2008, Intel Corporation
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; All rights reserved. This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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;------------------------------------------------------------------------------
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%define ADDR16_OF(x) (0x10000 - fourGigabytes + x)
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%define ADDR_OF(x) (0x100000000 - fourGigabytes + x)
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%macro OneTimeCall 1
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jmp %1
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%1 %+ OneTimerCallReturn:
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%endmacro
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%macro OneTimeCallRet 1
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jmp %1 %+ OneTimerCallReturn
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%endmacro
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StartOfResetVectorCode:
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%define ADDR_OF_START_OF_RESET_CODE ADDR_OF(StartOfResetVectorCode)
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;------------------------------------------------------------------------------
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; @file
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; Debug disabled
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;
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; Copyright (c) 2009, Intel Corporation
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; All rights reserved. This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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;------------------------------------------------------------------------------
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BITS 16
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%macro debugInitialize 0
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;
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; No initialization is required
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;
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%endmacro
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%macro debugShowPostCode 1
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%endmacro
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;------------------------------------------------------------------------------
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; @file
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; Transition from 16 bit real mode into 32 bit flat protected mode
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;
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; Copyright (c) 2008 - 2010, Intel Corporation
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; All rights reserved. This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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;------------------------------------------------------------------------------
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%define SEC_DEFAULT_CR0 0x40000023
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%define SEC_DEFAULT_CR4 0x640
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BITS 16
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;
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; Modified: EAX, EBX
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;
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TransitionFromReal16To32BitFlat:
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debugShowPostCode POSTCODE_16BIT_MODE
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cli
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mov bx, 0xf000
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mov ds, bx
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mov bx, ADDR16_OF(gdtr)
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o32 lgdt [cs:bx]
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mov eax, SEC_DEFAULT_CR0
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mov cr0, eax
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jmp LINEAR_CODE_SEL:dword ADDR_OF(jumpTo32BitAndLandHere)
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BITS 32
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jumpTo32BitAndLandHere:
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mov eax, SEC_DEFAULT_CR4
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mov cr4, eax
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debugShowPostCode POSTCODE_32BIT_MODE
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mov ax, LINEAR_SEL
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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mov ss, ax
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OneTimeCallRet TransitionFromReal16To32BitFlat
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ALIGN 2
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gdtr:
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dw GDT_END - GDT_BASE - 1 ; GDT limit
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dd ADDR_OF(GDT_BASE)
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ALIGN 16
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;
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; Macros for GDT entries
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;
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%define PRESENT_FLAG(p) (p << 7)
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%define DPL(dpl) (dpl << 5)
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%define SYSTEM_FLAG(s) (s << 4)
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%define DESC_TYPE(t) (t)
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; Type: data, expand-up, writable, accessed
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%define DATA32_TYPE 3
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; Type: execute, readable, expand-up, accessed
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%define CODE32_TYPE 0xb
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; Type: execute, readable, expand-up, accessed
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%define CODE64_TYPE 0xb
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%define GRANULARITY_FLAG(g) (g << 7)
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%define DEFAULT_SIZE32(d) (d << 6)
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%define CODE64_FLAG(l) (l << 5)
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%define UPPER_LIMIT(l) (l)
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;
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; The Global Descriptor Table (GDT)
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;
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GDT_BASE:
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; null descriptor
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NULL_SEL equ $-GDT_BASE
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DW 0 ; limit 15:0
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DW 0 ; base 15:0
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DB 0 ; base 23:16
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DB 0 ; sys flag, dpl, type
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DB 0 ; limit 19:16, flags
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DB 0 ; base 31:24
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; linear data segment descriptor
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LINEAR_SEL equ $-GDT_BASE
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DW 0xffff ; limit 15:0
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DW 0 ; base 15:0
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DB 0 ; base 23:16
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DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(DATA32_TYPE)
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DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)
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DB 0 ; base 31:24
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; linear code segment descriptor
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LINEAR_CODE_SEL equ $-GDT_BASE
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DW 0xffff ; limit 15:0
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DW 0 ; base 15:0
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DB 0 ; base 23:16
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DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE32_TYPE)
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DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)
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DB 0 ; base 31:24
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%ifdef ARCH_X64
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; linear code (64-bit) segment descriptor
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LINEAR_CODE64_SEL equ $-GDT_BASE
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DW 0xffff ; limit 15:0
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DW 0 ; base 15:0
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DB 0 ; base 23:16
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DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE64_TYPE)
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DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(0)|CODE64_FLAG(1)|UPPER_LIMIT(0xf)
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DB 0 ; base 31:24
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%endif
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GDT_END:
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;------------------------------------------------------------------------------
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; @file
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; 16-bit initialization code
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;
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; Copyright (c) 2008 - 2009, Intel Corporation
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; All rights reserved. This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
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; http://opensource.org/licenses/bsd-license.php
|
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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;------------------------------------------------------------------------------
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BITS 16
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;
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; @param[out] DI 'BP' to indicate boot-strap processor
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;
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EarlyBspInitReal16:
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mov di, 'BP'
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jmp short Main16
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;
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; @param[out] DI 'AP' to indicate application processor
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;
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EarlyApInitReal16:
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mov di, 'AP'
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jmp short Main16
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;
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; Modified: EAX
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;
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; @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test)
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||||
; @param[out] ESP Initial value of the EAX register (BIST: Built-in Self Test)
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;
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EarlyInit16:
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;
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; ESP - Initial value of the EAX register (BIST: Built-in Self Test)
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;
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mov esp, eax
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debugInitialize
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OneTimeCallRet EarlyInit16
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||||
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|
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;------------------------------------------------------------------------------
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||||
; @file
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||||
; First code exectuted by processor after resetting.
|
||||
;
|
||||
; Copyright (c) 2008 - 2009, Intel Corporation
|
||||
; All rights reserved. This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
BITS 16
|
||||
|
||||
ALIGN 16
|
||||
|
||||
applicationProcessorEntryPoint:
|
||||
;
|
||||
; Application Processors entry point
|
||||
;
|
||||
; GenFv generates code aligned on a 4k boundary which will jump to this
|
||||
; location. (0xffffffe0) This allows the Local APIC Startup IPI to be
|
||||
; used to wake up the application processors.
|
||||
;
|
||||
jmp short EarlyApInitReal16
|
||||
|
||||
ALIGN 8
|
||||
|
||||
DD 0
|
||||
|
||||
;
|
||||
; The VTF signature
|
||||
;
|
||||
; VTF-0 means that the VTF (Volume Top File) code does not require
|
||||
; any fixups.
|
||||
;
|
||||
vtfSignature:
|
||||
DB 'V', 'T', 'F', 0
|
||||
|
||||
ALIGN 16
|
||||
|
||||
resetVector:
|
||||
;
|
||||
; Reset Vector
|
||||
;
|
||||
; This is where the processor will begin execution
|
||||
;
|
||||
wbinvd
|
||||
jmp short EarlyBspInitReal16
|
||||
|
||||
ALIGN 16
|
||||
|
||||
fourGigabytes:
|
||||
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
;------------------------------------------------------------------------------
|
||||
; @file
|
||||
; Transition from 32 bit flat protected mode into 64 bit flat protected mode
|
||||
;
|
||||
; Copyright (c) 2008 - 2009, Intel Corporation
|
||||
; All rights reserved. This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
BITS 32
|
||||
|
||||
;
|
||||
; Modified: EAX
|
||||
;
|
||||
Transition32FlatTo64Flat:
|
||||
|
||||
mov eax, ((ADDR_OF_START_OF_RESET_CODE & ~0xfff) - 0x1000)
|
||||
mov cr3, eax
|
||||
|
||||
mov eax, cr4
|
||||
bts eax, 5 ; enable PAE
|
||||
mov cr4, eax
|
||||
|
||||
mov ecx, 0xc0000080
|
||||
rdmsr
|
||||
bts eax, 8 ; set LME
|
||||
wrmsr
|
||||
|
||||
mov eax, cr0
|
||||
bts eax, 31 ; set PG
|
||||
mov cr0, eax ; enable paging
|
||||
|
||||
jmp LINEAR_CODE64_SEL:ADDR_OF(jumpTo64BitAndLandHere)
|
||||
BITS 64
|
||||
jumpTo64BitAndLandHere:
|
||||
|
||||
debugShowPostCode POSTCODE_64BIT_MODE
|
||||
|
||||
OneTimeCallRet Transition32FlatTo64Flat
|
||||
|
||||
|
|
@ -0,0 +1,86 @@
|
|||
;------------------------------------------------------------------------------
|
||||
; @file
|
||||
; Search for the Boot Firmware Volume (BFV) base address
|
||||
;
|
||||
; Copyright (c) 2008 - 2009, Intel Corporation
|
||||
; All rights reserved. This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
;#define EFI_FIRMWARE_FILE_SYSTEM2_GUID \
|
||||
; { 0x8c8ce578, 0x8a3d, 0x4f1c, { 0x99, 0x35, 0x89, 0x61, 0x85, 0xc3, 0x2d, 0xd3 } }
|
||||
%define FFS_GUID_DWORD0 0x8c8ce578
|
||||
%define FFS_GUID_DWORD1 0x4f1c8a3d
|
||||
%define FFS_GUID_DWORD2 0x61893599
|
||||
%define FFS_GUID_DWORD3 0xd32dc385
|
||||
|
||||
BITS 32
|
||||
|
||||
;
|
||||
; Modified: EAX, EBX
|
||||
; Preserved: EDI, ESP
|
||||
;
|
||||
; @param[out] EBP Address of Boot Firmware Volume (BFV)
|
||||
;
|
||||
Flat32SearchForBfvBase:
|
||||
|
||||
xor eax, eax
|
||||
searchingForBfvHeaderLoop:
|
||||
;
|
||||
; We check for a firmware volume at every 4KB address in the top 16MB
|
||||
; just below 4GB. (Addresses at 0xffHHH000 where H is any hex digit.)
|
||||
;
|
||||
sub eax, 0x1000
|
||||
cmp eax, 0xff000000
|
||||
jb searchedForBfvHeaderButNotFound
|
||||
|
||||
;
|
||||
; Check FFS GUID
|
||||
;
|
||||
cmp dword [eax + 0x10], FFS_GUID_DWORD0
|
||||
jne searchingForBfvHeaderLoop
|
||||
cmp dword [eax + 0x14], FFS_GUID_DWORD1
|
||||
jne searchingForBfvHeaderLoop
|
||||
cmp dword [eax + 0x18], FFS_GUID_DWORD2
|
||||
jne searchingForBfvHeaderLoop
|
||||
cmp dword [eax + 0x1c], FFS_GUID_DWORD3
|
||||
jne searchingForBfvHeaderLoop
|
||||
|
||||
;
|
||||
; Check FV Length
|
||||
;
|
||||
cmp dword [eax + 0x24], 0
|
||||
jne searchingForBfvHeaderLoop
|
||||
mov ebx, eax
|
||||
add ebx, dword [eax + 0x20]
|
||||
jnz searchingForBfvHeaderLoop
|
||||
|
||||
jmp searchedForBfvHeaderAndItWasFound
|
||||
|
||||
searchedForBfvHeaderButNotFound:
|
||||
;
|
||||
; Hang if the SEC entry point was not found
|
||||
;
|
||||
debugShowPostCode POSTCODE_BFV_NOT_FOUND
|
||||
|
||||
;
|
||||
; 0xbfbfbfbf in the EAX & EBP registers helps signal what failed
|
||||
; for debugging purposes.
|
||||
;
|
||||
mov eax, 0xBFBFBFBF
|
||||
mov ebp, eax
|
||||
jmp $
|
||||
|
||||
searchedForBfvHeaderAndItWasFound:
|
||||
mov ebp, eax
|
||||
|
||||
debugShowPostCode POSTCODE_BFV_FOUND
|
||||
|
||||
OneTimeCallRet Flat32SearchForBfvBase
|
||||
|
||||
|
|
@ -0,0 +1,196 @@
|
|||
;------------------------------------------------------------------------------
|
||||
; @file
|
||||
; Search for the SEC Core entry point
|
||||
;
|
||||
; Copyright (c) 2008 - 2009, Intel Corporation
|
||||
; All rights reserved. This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
BITS 32
|
||||
|
||||
%define EFI_FV_FILETYPE_SECURITY_CORE 0x03
|
||||
|
||||
;
|
||||
; Modified: EAX, EBX, ECX, EDX
|
||||
; Preserved: EDI, EBP, ESP
|
||||
;
|
||||
; @param[in] EBP Address of Boot Firmware Volume (BFV)
|
||||
; @param[out] ESI SEC Core Entry Point Address
|
||||
;
|
||||
Flat32SearchForSecEntryPoint:
|
||||
|
||||
;
|
||||
; Initialize EBP and ESI to 0
|
||||
;
|
||||
xor ebx, ebx
|
||||
mov esi, ebx
|
||||
|
||||
;
|
||||
; Pass over the BFV header
|
||||
;
|
||||
mov eax, ebp
|
||||
mov bx, [ebp + 0x30]
|
||||
add eax, ebx
|
||||
jc secEntryPointWasNotFound
|
||||
|
||||
jmp searchingForFfsFileHeaderLoop
|
||||
|
||||
moveForwardWhileSearchingForFfsFileHeaderLoop:
|
||||
;
|
||||
; Make forward progress in the search
|
||||
;
|
||||
inc eax
|
||||
jc secEntryPointWasNotFound
|
||||
|
||||
searchingForFfsFileHeaderLoop:
|
||||
test eax, eax
|
||||
jz secEntryPointWasNotFound
|
||||
|
||||
;
|
||||
; Ensure 8 byte alignment
|
||||
;
|
||||
add eax, 7
|
||||
jc secEntryPointWasNotFound
|
||||
and al, 0xf8
|
||||
|
||||
;
|
||||
; Look to see if there is an FFS file at eax
|
||||
;
|
||||
mov bl, [eax + 0x17]
|
||||
test bl, 0x20
|
||||
jz moveForwardWhileSearchingForFfsFileHeaderLoop
|
||||
mov ecx, [eax + 0x14]
|
||||
and ecx, 0x00ffffff
|
||||
or ecx, ecx
|
||||
jz moveForwardWhileSearchingForFfsFileHeaderLoop
|
||||
add ecx, eax
|
||||
jz jumpSinceWeFoundTheLastFfsFile
|
||||
jc moveForwardWhileSearchingForFfsFileHeaderLoop
|
||||
jumpSinceWeFoundTheLastFfsFile:
|
||||
|
||||
;
|
||||
; There seems to be a valid file at eax
|
||||
;
|
||||
cmp byte [eax + 0x12], EFI_FV_FILETYPE_SECURITY_CORE ; Check File Type
|
||||
jne readyToTryFfsFileAtEcx
|
||||
|
||||
fileTypeIsSecCore:
|
||||
OneTimeCall GetEntryPointOfFfsFile
|
||||
test eax, eax
|
||||
jnz doneSeachingForSecEntryPoint
|
||||
|
||||
readyToTryFfsFileAtEcx:
|
||||
;
|
||||
; Try the next FFS file at ECX
|
||||
;
|
||||
mov eax, ecx
|
||||
jmp searchingForFfsFileHeaderLoop
|
||||
|
||||
secEntryPointWasNotFound:
|
||||
xor eax, eax
|
||||
|
||||
doneSeachingForSecEntryPoint:
|
||||
mov esi, eax
|
||||
|
||||
test esi, esi
|
||||
jnz secCoreEntryPointWasFound
|
||||
|
||||
secCoreEntryPointWasNotFound:
|
||||
;
|
||||
; Hang if the SEC entry point was not found
|
||||
;
|
||||
debugShowPostCode POSTCODE_SEC_NOT_FOUND
|
||||
jz $
|
||||
|
||||
secCoreEntryPointWasFound:
|
||||
debugShowPostCode POSTCODE_SEC_FOUND
|
||||
|
||||
OneTimeCallRet Flat32SearchForSecEntryPoint
|
||||
|
||||
%define EFI_SECTION_PE32 0x10
|
||||
|
||||
;
|
||||
; Input:
|
||||
; EAX - Start of FFS file
|
||||
; ECX - End of FFS file
|
||||
;
|
||||
; Output:
|
||||
; EAX - Entry point of PE32 (or 0 if not found)
|
||||
;
|
||||
; Modified:
|
||||
; EBX
|
||||
;
|
||||
GetEntryPointOfFfsFile:
|
||||
test eax, eax
|
||||
jz getEntryPointOfFfsFileErrorReturn
|
||||
add eax, 0x18 ; EAX = Start of section
|
||||
|
||||
getEntryPointOfFfsFileLoopForSections:
|
||||
cmp eax, ecx
|
||||
jae getEntryPointOfFfsFileErrorReturn
|
||||
|
||||
cmp byte [eax + 3], EFI_SECTION_PE32
|
||||
je getEntryPointOfFfsFileFoundPe32Section
|
||||
|
||||
;
|
||||
; The section type was not PE32, so move to next section
|
||||
;
|
||||
mov ebx, dword [eax]
|
||||
and ebx, 0x00ffffff
|
||||
add eax, ebx
|
||||
jc getEntryPointOfFfsFileErrorReturn
|
||||
|
||||
;
|
||||
; Ensure that FFS section is 32-bit aligned
|
||||
;
|
||||
add eax, 3
|
||||
jc getEntryPointOfFfsFileErrorReturn
|
||||
and al, 0xfc
|
||||
jmp getEntryPointOfFfsFileLoopForSections
|
||||
|
||||
getEntryPointOfFfsFileFoundPe32Section:
|
||||
add eax, 4 ; EAX = Start of PE32 image
|
||||
|
||||
mov ebx, eax
|
||||
cmp word [eax], 'MZ'
|
||||
jne thereIsNotAnMzSignature
|
||||
movzx ebx, word [eax + 0x3c]
|
||||
add ebx, eax
|
||||
thereIsNotAnMzSignature:
|
||||
|
||||
; if (Hdr.Te->Signature == EFI_TE_IMAGE_HEADER_SIGNATURE)
|
||||
cmp word [ebx], 'VZ'
|
||||
jne thereIsNoVzSignature
|
||||
; *EntryPoint = (VOID *)((UINTN)Pe32Data +
|
||||
; (UINTN)(Hdr.Te->AddressOfEntryPoint & 0x0ffffffff) +
|
||||
; sizeof(EFI_TE_IMAGE_HEADER) - Hdr.Te->StrippedSize);
|
||||
add eax, [ebx + 0x8]
|
||||
add eax, 0x28
|
||||
movzx ebx, word [ebx + 0x6]
|
||||
sub eax, ebx
|
||||
jmp getEntryPointOfFfsFileReturn
|
||||
|
||||
thereIsNoVzSignature:
|
||||
|
||||
; if (Hdr.Pe32->Signature == EFI_IMAGE_NT_SIGNATURE)
|
||||
cmp dword [ebx], `PE\x00\x00`
|
||||
jne getEntryPointOfFfsFileErrorReturn
|
||||
|
||||
; *EntryPoint = (VOID *)((UINTN)Pe32Data +
|
||||
; (UINTN)(Hdr.Pe32->OptionalHeader.AddressOfEntryPoint & 0x0ffffffff));
|
||||
add eax, [ebx + 0x4 + 0x14 + 0x10]
|
||||
jmp getEntryPointOfFfsFileReturn
|
||||
|
||||
getEntryPointOfFfsFileErrorReturn:
|
||||
mov eax, 0
|
||||
|
||||
getEntryPointOfFfsFileReturn:
|
||||
OneTimeCallRet GetEntryPointOfFfsFile
|
||||
|
||||
|
|
@ -0,0 +1,106 @@
|
|||
;------------------------------------------------------------------------------
|
||||
; @file
|
||||
; Main routine of the pre-SEC code up through the jump into SEC
|
||||
;
|
||||
; Copyright (c) 2008 - 2009, Intel Corporation
|
||||
; All rights reserved. This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
|
||||
BITS 16
|
||||
|
||||
;
|
||||
; Modified: EBX, ECX, EDX, EBP
|
||||
;
|
||||
; @param[in,out] RAX/EAX Initial value of the EAX register
|
||||
; (BIST: Built-in Self Test)
|
||||
; @param[in,out] DI 'BP': boot-strap processor, or
|
||||
; 'AP': application processor
|
||||
; @param[out] RBP/EBP Address of Boot Firmware Volume (BFV)
|
||||
;
|
||||
; @return None This routine jumps to SEC and does not return
|
||||
;
|
||||
Main16:
|
||||
OneTimeCall EarlyInit16
|
||||
|
||||
;
|
||||
; Transition the processor from 16-bit real mode to 32-bit flat mode
|
||||
;
|
||||
OneTimeCall TransitionFromReal16To32BitFlat
|
||||
|
||||
BITS 32
|
||||
|
||||
;
|
||||
; Search for the Boot Firmware Volume (BFV)
|
||||
;
|
||||
OneTimeCall Flat32SearchForBfvBase
|
||||
|
||||
;
|
||||
; EBP - Start of BFV
|
||||
;
|
||||
|
||||
;
|
||||
; Search for the SEC entry point
|
||||
;
|
||||
OneTimeCall Flat32SearchForSecEntryPoint
|
||||
|
||||
;
|
||||
; ESI - SEC Core entry point
|
||||
; EBP - Start of BFV
|
||||
;
|
||||
|
||||
%ifdef ARCH_IA32
|
||||
|
||||
;
|
||||
; Restore initial EAX value into the EAX register
|
||||
;
|
||||
mov eax, esp
|
||||
|
||||
;
|
||||
; Jump to the 32-bit SEC entry point
|
||||
;
|
||||
jmp esi
|
||||
|
||||
%else
|
||||
|
||||
;
|
||||
; Transition the processor from 32-bit flat mode to 64-bit flat mode
|
||||
;
|
||||
OneTimeCall Transition32FlatTo64Flat
|
||||
|
||||
BITS 64
|
||||
|
||||
;
|
||||
; Some values were calculated in 32-bit mode. Make sure the upper
|
||||
; 32-bits of 64-bit registers are zero for these values.
|
||||
;
|
||||
mov rax, 0x00000000ffffffff
|
||||
and rsi, rax
|
||||
and rbp, rax
|
||||
and rsp, rax
|
||||
|
||||
;
|
||||
; RSI - SEC Core entry point
|
||||
; RBP - Start of BFV
|
||||
;
|
||||
|
||||
;
|
||||
; Restore initial EAX value into the RAX register
|
||||
;
|
||||
mov rax, rsp
|
||||
|
||||
;
|
||||
; Jump to the 64-bit SEC entry point
|
||||
;
|
||||
jmp rsi
|
||||
|
||||
%endif
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
## @file
|
||||
# Makefile to create FFS Raw sections for VTF images.
|
||||
#
|
||||
# Copyright (c) 2008, Intel Corporation
|
||||
#
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
|
||||
TARGETS = Bin/ResetVector.ia32.raw Bin/ResetVector.x64.raw
|
||||
ASM = nasm
|
||||
|
||||
COMMON_DEPS = \
|
||||
Ia16/16RealTo32Flat.asm \
|
||||
Ia32/32FlatTo64Flat.asm \
|
||||
JumpToSec.asm \
|
||||
Ia16/ResetVectorVtf0.asm \
|
||||
Ia32/SearchForBfvBase.asm \
|
||||
Ia32/SearchForSecAndPeiEntries.asm \
|
||||
SerialDebug.asm \
|
||||
Makefile \
|
||||
Tools/FixupForRawSection.py
|
||||
|
||||
.PHONY: all
|
||||
all: $(TARGETS)
|
||||
|
||||
Bin/ResetVector.ia32.raw: $(COMMON_DEPS) ResetVectorCode.asm
|
||||
nasm -D ARCH_IA32 -o $@ ResetVectorCode.asm
|
||||
python Tools/FixupForRawSection.py $@
|
||||
|
||||
Bin/ResetVector.x64.raw: $(COMMON_DEPS) ResetVectorCode.asm
|
||||
nasm -D ARCH_X64 -o $@ ResetVectorCode.asm
|
||||
python Tools/FixupForRawSection.py $@
|
||||
|
||||
clean:
|
||||
-rm $(TARGETS)
|
||||
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
;------------------------------------------------------------------------------
|
||||
; @file
|
||||
; Port 0x80 debug support macros
|
||||
;
|
||||
; Copyright (c) 2009, Intel Corporation
|
||||
; All rights reserved. This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
BITS 16
|
||||
|
||||
%macro debugInitialize 0
|
||||
;
|
||||
; No initialization is required
|
||||
;
|
||||
%endmacro
|
||||
|
||||
%macro debugShowPostCode 1
|
||||
mov al, %1
|
||||
out 0x80, al
|
||||
%endmacro
|
||||
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
;------------------------------------------------------------------------------
|
||||
; @file
|
||||
; Definitions of POST CODES for the reset vector module
|
||||
;
|
||||
; Copyright (c) 2009, Intel Corporation
|
||||
; All rights reserved. This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
%define POSTCODE_16BIT_MODE 0x16
|
||||
%define POSTCODE_32BIT_MODE 0x32
|
||||
%define POSTCODE_64BIT_MODE 0x64
|
||||
|
||||
%define POSTCODE_BFV_NOT_FOUND 0xb0
|
||||
%define POSTCODE_BFV_FOUND 0xb1
|
||||
|
||||
%define POSTCODE_SEC_NOT_FOUND 0xf0
|
||||
%define POSTCODE_SEC_FOUND 0xf1
|
||||
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
;------------------------------------------------------------------------------
|
||||
; @file
|
||||
; This file includes all other code files to assemble the reset vector code
|
||||
;
|
||||
; Copyright (c) 2008 - 2009, Intel Corporation
|
||||
; All rights reserved. This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
%ifdef ARCH_IA32
|
||||
%ifdef ARCH_X64
|
||||
%error "Only one of ARCH_IA32 or ARCH_X64 can be defined."
|
||||
%endif
|
||||
%elifdef ARCH_X64
|
||||
%else
|
||||
%error "Either ARCH_IA32 or ARCH_X64 must be defined."
|
||||
%endif
|
||||
|
||||
%include "CommonMacros.inc"
|
||||
|
||||
%include "PostCodes.inc"
|
||||
|
||||
%ifdef DEBUG_NONE
|
||||
%include "DebugDisabled.asm"
|
||||
%elifdef DEBUG_PORT80
|
||||
%include "Port80Debug.asm"
|
||||
%elifdef DEBUG_SERIAL
|
||||
%include "SerialDebug.asm"
|
||||
%else
|
||||
%error "No debug type was specified."
|
||||
%endif
|
||||
|
||||
%include "Ia32/SearchForBfvBase.asm"
|
||||
%include "Ia32/SearchForSecEntry.asm"
|
||||
|
||||
%ifdef ARCH_X64
|
||||
%include "Ia32/32FlatTo64Flat.asm"
|
||||
%endif
|
||||
|
||||
%include "Ia16/16RealTo32Flat.asm"
|
||||
%include "Ia16/Init16.asm"
|
||||
|
||||
%include "Main.asm"
|
||||
|
||||
%include "Ia16/ResetVectorVtf0.asm"
|
||||
|
||||
|
|
@ -0,0 +1,132 @@
|
|||
;------------------------------------------------------------------------------
|
||||
; @file
|
||||
; Serial port debug support macros
|
||||
;
|
||||
; Copyright (c) 2008 - 2009, Intel Corporation
|
||||
; All rights reserved. This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
;//---------------------------------------------
|
||||
;// UART Register Offsets
|
||||
;//---------------------------------------------
|
||||
%define BAUD_LOW_OFFSET 0x00
|
||||
%define BAUD_HIGH_OFFSET 0x01
|
||||
%define IER_OFFSET 0x01
|
||||
%define LCR_SHADOW_OFFSET 0x01
|
||||
%define FCR_SHADOW_OFFSET 0x02
|
||||
%define IR_CONTROL_OFFSET 0x02
|
||||
%define FCR_OFFSET 0x02
|
||||
%define EIR_OFFSET 0x02
|
||||
%define BSR_OFFSET 0x03
|
||||
%define LCR_OFFSET 0x03
|
||||
%define MCR_OFFSET 0x04
|
||||
%define LSR_OFFSET 0x05
|
||||
%define MSR_OFFSET 0x06
|
||||
|
||||
;//---------------------------------------------
|
||||
;// UART Register Bit Defines
|
||||
;//---------------------------------------------
|
||||
%define LSR_TXRDY 0x20
|
||||
%define LSR_RXDA 0x01
|
||||
%define DLAB 0x01
|
||||
|
||||
; UINT16 gComBase = 0x3f8;
|
||||
; UINTN gBps = 115200;
|
||||
; UINT8 gData = 8;
|
||||
; UINT8 gStop = 1;
|
||||
; UINT8 gParity = 0;
|
||||
; UINT8 gBreakSet = 0;
|
||||
|
||||
%define DEFAULT_COM_BASE 0x3f8
|
||||
%define DEFAULT_BPS 115200
|
||||
%define DEFAULT_DATA 8
|
||||
%define DEFAULT_STOP 1
|
||||
%define DEFAULT_PARITY 0
|
||||
%define DEFAULT_BREAK_SET 0
|
||||
|
||||
%define SERIAL_DEFAULT_LCR ( \
|
||||
(DEFAULT_BREAK_SET << 6) | \
|
||||
(DEFAULT_PARITY << 3) | \
|
||||
(DEFAULT_STOP << 2) | \
|
||||
(DEFAULT_DATA - 5) \
|
||||
)
|
||||
|
||||
%define SERIAL_PORT_IO_BASE_ADDRESS DEFAULT_COM_BASE
|
||||
|
||||
%macro inFromSerialPort 1
|
||||
mov dx, (SERIAL_PORT_IO_BASE_ADDRESS + %1)
|
||||
in al, dx
|
||||
%endmacro
|
||||
|
||||
%macro waitForSerialTxReady 0
|
||||
|
||||
%%waitingForTx:
|
||||
inFromSerialPort LSR_OFFSET
|
||||
test al, LSR_TXRDY
|
||||
jz %%waitingForTx
|
||||
|
||||
%endmacro
|
||||
|
||||
%macro outToSerialPort 2
|
||||
mov dx, (SERIAL_PORT_IO_BASE_ADDRESS + %1)
|
||||
mov al, %2
|
||||
out dx, al
|
||||
%endmacro
|
||||
|
||||
%macro debugShowCharacter 1
|
||||
waitForSerialTxReady
|
||||
outToSerialPort 0, %1
|
||||
%endmacro
|
||||
|
||||
%macro debugShowHexDigit 1
|
||||
%if (%1 < 0xa)
|
||||
debugShowCharacter BYTE ('0' + (%1))
|
||||
%else
|
||||
debugShowCharacter BYTE ('a' + ((%1) - 0xa))
|
||||
%endif
|
||||
%endmacro
|
||||
|
||||
%macro debugNewline 0
|
||||
debugShowCharacter `\r`
|
||||
debugShowCharacter `\n`
|
||||
%endmacro
|
||||
|
||||
%macro debugShowPostCode 1
|
||||
debugShowHexDigit (((%1) >> 4) & 0xf)
|
||||
debugShowHexDigit ((%1) & 0xf)
|
||||
debugNewline
|
||||
%endmacro
|
||||
|
||||
BITS 16
|
||||
|
||||
%macro debugInitialize 0
|
||||
jmp real16InitDebug
|
||||
real16InitDebugReturn:
|
||||
%endmacro
|
||||
|
||||
real16InitDebug:
|
||||
;
|
||||
; Set communications format
|
||||
;
|
||||
outToSerialPort LCR_OFFSET, ((DLAB << 7) | SERIAL_DEFAULT_LCR)
|
||||
|
||||
;
|
||||
; Configure baud rate
|
||||
;
|
||||
outToSerialPort BAUD_HIGH_OFFSET, ((115200 / DEFAULT_BPS) >> 8)
|
||||
outToSerialPort BAUD_LOW_OFFSET, ((115200 / DEFAULT_BPS) & 0xff)
|
||||
|
||||
;
|
||||
; Switch back to bank 0
|
||||
;
|
||||
outToSerialPort LCR_OFFSET, SERIAL_DEFAULT_LCR
|
||||
|
||||
jmp real16InitDebugReturn
|
||||
|
||||
|
|
@ -0,0 +1,110 @@
|
|||
## @file
|
||||
# Apply fixup to VTF binary image for FFS Raw section
|
||||
#
|
||||
# Copyright (c) 2008, Intel Corporation
|
||||
#
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
|
||||
import sys
|
||||
|
||||
filename = sys.argv[1]
|
||||
|
||||
if filename.lower().find('ia32') >= 0:
|
||||
d = open(sys.argv[1], 'rb').read()
|
||||
c = ((len(d) + 4 + 7) & ~7) - 4
|
||||
if c > len(d):
|
||||
c -= len(d)
|
||||
f = open(sys.argv[1], 'wb')
|
||||
f.write('\x90' * c)
|
||||
f.write(d)
|
||||
f.close()
|
||||
else:
|
||||
from struct import pack
|
||||
|
||||
PAGE_PRESENT = 0x01
|
||||
PAGE_READ_WRITE = 0x02
|
||||
PAGE_USER_SUPERVISOR = 0x04
|
||||
PAGE_WRITE_THROUGH = 0x08
|
||||
PAGE_CACHE_DISABLE = 0x010
|
||||
PAGE_ACCESSED = 0x020
|
||||
PAGE_DIRTY = 0x040
|
||||
PAGE_PAT = 0x080
|
||||
PAGE_GLOBAL = 0x0100
|
||||
PAGE_2M_MBO = 0x080
|
||||
PAGE_2M_PAT = 0x01000
|
||||
|
||||
def NopAlign4k(s):
|
||||
c = ((len(s) + 0xfff) & ~0xfff) - len(s)
|
||||
return ('\x90' * c) + s
|
||||
|
||||
def PageDirectoryEntries4GbOf2MbPages(baseAddress):
|
||||
|
||||
s = ''
|
||||
for i in range(0x800):
|
||||
i = (
|
||||
baseAddress + long(i << 21) +
|
||||
PAGE_2M_MBO +
|
||||
PAGE_CACHE_DISABLE +
|
||||
PAGE_ACCESSED +
|
||||
PAGE_DIRTY +
|
||||
PAGE_READ_WRITE +
|
||||
PAGE_PRESENT
|
||||
)
|
||||
s += pack('Q', i)
|
||||
return s
|
||||
|
||||
def PageDirectoryPointerTable4GbOf2MbPages(pdeBase):
|
||||
s = ''
|
||||
for i in range(0x200):
|
||||
i = (
|
||||
pdeBase +
|
||||
(min(i, 3) << 12) +
|
||||
PAGE_CACHE_DISABLE +
|
||||
PAGE_ACCESSED +
|
||||
PAGE_READ_WRITE +
|
||||
PAGE_PRESENT
|
||||
)
|
||||
s += pack('Q', i)
|
||||
return s
|
||||
|
||||
def PageMapLevel4Table4GbOf2MbPages(pdptBase):
|
||||
s = ''
|
||||
for i in range(0x200):
|
||||
i = (
|
||||
pdptBase +
|
||||
(min(i, 0) << 12) +
|
||||
PAGE_CACHE_DISABLE +
|
||||
PAGE_ACCESSED +
|
||||
PAGE_READ_WRITE +
|
||||
PAGE_PRESENT
|
||||
)
|
||||
s += pack('Q', i)
|
||||
return s
|
||||
|
||||
def First4GbPageEntries(topAddress):
|
||||
PDE = PageDirectoryEntries4GbOf2MbPages(0L)
|
||||
pml4tBase = topAddress - 0x1000
|
||||
pdptBase = pml4tBase - 0x1000
|
||||
pdeBase = pdptBase - len(PDE)
|
||||
PDPT = PageDirectoryPointerTable4GbOf2MbPages(pdeBase)
|
||||
PML4T = PageMapLevel4Table4GbOf2MbPages(pdptBase)
|
||||
return PDE + PDPT + PML4T
|
||||
|
||||
def AlignAndAddPageTables():
|
||||
d = open(sys.argv[1], 'rb').read()
|
||||
code = NopAlign4k(d)
|
||||
topAddress = 0x100000000 - len(code)
|
||||
d = ('\x90' * 4) + First4GbPageEntries(topAddress) + code
|
||||
f = open(sys.argv[1], 'wb')
|
||||
f.write(d)
|
||||
f.close()
|
||||
|
||||
AlignAndAddPageTables()
|
||||
|
||||
Loading…
Reference in New Issue